M451
May. 4, 2018
Page
619
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1006
Rev.2.08
M4
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6.13.7 Register Description
UART Receive/Transmit Buffer Register (UART_DAT)
Register
Offset
R/W
Description
Reset Value
UART_DAT
x=0,1,2,3
U0x00
R/W
UART Receive/Transmit Buffer Register
Undefined
31
30
29
28
27
26
25
24
Reserved
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
Reserved
7
6
5
4
3
2
1
0
DAT
Bits
Description
[31:8]
Reserved
Reserved.
[7:0]
DAT
Receiving/Transmit Buffer
Write Operation:
By writing one byte to this register, the data byte will be stored in transmitter FIFO. The
UART Controller will send out the data stored in transmitter FIFO top location through the
UART_TXD. Read Operation:
By reading this register, the UART will return an 8-bit data received from receiving FIFO.
