M451
May. 4, 2018
Page
288
of
1006
Rev.2.08
M4
51
S
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NICA
L RE
F
E
R
E
NC
E
M
A
NU
A
L
Clock Source Select Control Register 3 (CLK_CLKSEL3)
Before clock switching, the related clock sources (pre-select and new-select) must be turned on.
Register
Offset
R/W
Description
Reset Value
CLK_CLKSEL
3
0x1C
R/W
Clock Source Select Control Register 3
0x0000_0003
31
30
29
28
27
26
25
24
Reserved
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
Reserved
RTCSEL
7
6
5
4
3
2
1
0
Reserved
SC0SEL
Bits
Description
[31:9]
Reserved
Reserved.
[8]
RTCSEL
RTC Clock Source Selection
0 = Clock source from 32.768 kHz external low speed crystal oscillator (LXT).
1 = Clock source from 10 kHz internal low speed RC oscillator (LIRC).
[7:2]
Reserved
Reserved.
[1:0]
SC0SEL
SC0 Clock Source Selection
00 = Clock source from 4~20 MHz external high speed crystal oscillator (HXT).
01 = Clock source from PLL.
10 = Clock source from PCLK0.
11 = Clock source from 22.1184 MHz internal high speed RC oscillator (HIRC).
