Nuvoton ARM Cortex NuMicro M451 Series, Technical Reference Manual

Page: 200 / 1006

M451
May. 4, 2018 Page 200 of 1006 Rev.2.08
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Brown-out Detector Control Register (SYS_BODCTL)
Partial of the SYS_BODCTL control registers values are initiated by the flash configuration and partial
bits are write-protected bit.
Register Offset R/W Description Reset Value
SYS_BODCTL 0x18 R/W Brown-Out Detector Control Register 0x0000_038X
31 30 29 28 27 26 25 24
Reserved
23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8
Reserved LVRDGSEL Reserved BODDGSEL
7 6 5 4 3 2 1 0
LVREN BODOUT BODLPM BODIF BODRSTEN BODVL BODEN
Bits Description
[31:15] Reserved Reserved.
[14:12] LVRDGSEL
LVR Output De-glitch Time Select (Write Protect)
000 = Without de-glitch function.
001 = 4 system clock (HCLK).
010 = 8 system clock (HCLK).
011 = 16 system clock (HCLK).
100 = 32 system clock (HCLK).
101 = 64 system clock (HCLK).
110 = 128 system clock (HCLK).
111 = 256 system clock (HCLK).
Note: These bits are write protected. Refer to the SYS_REGLCTL register.
[11] Reserved Reserved.
[10:8] BODDGSEL
Brown-out Detector Output De-glitch Time Select (Write Protect)
000 = BOD output is sampled by RC10K clock.
001 = 4 system clock (HCLK).
010 = 8 system clock (HCLK).
011 = 16 system clock (HCLK).
100 = 32 system clock (HCLK).
101 = 64 system clock (HCLK).
110 = 128 system clock (HCLK).
111 = 256 system clock (HCLK).
Note: These bits are write protected. Refer to the SYS_REGLCTL register.