Fujitsu F2MC-16LX Series, Hardware Manual

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CHAPTER 17 Address Match Detecting Function
17.3.2 Detect address setting registers (PADR0, PADR1)
The value of an address to be detected is set in the detect address setting
registers.When the address of the instruction processed by the program matches the
address set in the detect address setting registers, the next instruction is forcibly
replaced by the INT9 instruction, and the interrupt processing program is executed.
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Detect address setting registers (PADR0, PADR1)
Figure 17.3-3 Detect address setting registers (PADR0, PADR1)
R/W R/W R/W R/W R/W R/W R/W R/W
D11 D8 D9 D10 D15 D12 D13 D14
bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8
Reset value
XXXXXXXX
B
R/W R/W R/W R/W R/W R/W R/W R/W
D19 D16 D17 D18 D23 D20 D21 D22
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
Reset value
XXXXXXXX
B
R/W R/W R/W R/W R/W R/W R/W R/W
D3 D0 D1 D2 D7 D4 D5 D6
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
PADR0 PADR1 : High
PADR0 PADR1 : Middle
Reset value
XXXXXXXX
B
: Read/Write R/W
: Undefined X
PADR0 PADR1 : Low