188
CHAPTER 4 I/O PORT
4.7.2
Operation of Port 5
The operation of port 5 is explained.
■
Operation of Port 5
●
Operation of output port
•
When the bit in the port 5 direction register (DDR5) corresponding to the output pin is set to 1, port 5
functions as an output port.
•
When the output buffer is turned "ON2 and output data is written to the port 5 data register (PDR5), the
data is retained in the output latch and output from the pin.
•
When the port 5 data register (PDR5) is read, the state of the output latch in the PDR5 is read.
●
Operation of input port
•
If the bit in the DDR5 corresponding to the input pin is set to 0, port 5 functions as an input port.
•
The output buffer is turned "OFF" and the pin enters the high impedance state.
•
When data is written to the port 5 data register (PDR5), it is retained in the output latch in the PDR5 but
not output to the pin.
•
When the PDR5 is read, the level value (Low or High) of the pin is read.
●
Operation of analog input
•
When using port 5 as an analog input pin, set the bit in the ADER corresponding to the analog input pin
to "1".Port 5 is disabled to operate as a general-purpose I/O port, and functions as an analog input pin.
•
When the PDR5 is read with the bit set to analog input enabled, the read value is "0".
Note:
If read modify write instructions (such as the bit set instruction) are used to read the PDR, the
pin set as an output port by the DDR outputs the desired data. To switch a pin from input port
to output port, write output data to the port data register and use the port direction register to
set the pin as an output port.
Summary of Contents for F2MC-16LX Series
Page 2: ......
Page 3: ...FUJITSU LIMITED F2MC 16LX 16 bit Microcontroller MB90895 series Hardware Manual ...
Page 4: ......
Page 8: ...iv ...
Page 10: ...vi ...
Page 36: ...18 CHAPTER 2 HANDLING DEVICES ...
Page 176: ...158 CHAPTER 3 CPU ...
Page 224: ...206 CHAPTER 5 Timebase timer ...
Page 294: ...276 CHAPTER 8 16 bit reload timer ...
Page 366: ...348 CHAPTER 12 DTP external interrupt ...
Page 398: ...380 CHAPTER 13 8 10 bit A D converter ...
Page 446: ...428 CHAPTER 14 UART0 ...
Page 588: ...570 CHAPTER 17 Address Match Detecting Function ...
Page 626: ...608 CHAPTER 19 512 KBIT FLASH MEMORY ...
Page 676: ...658 APPENDIX Table A 9 3 Bit Operation Instruction Map first byte 6CH ...
Page 678: ...660 APPENDIX Table A 9 5 2 byte Instruction Map first byte 6FH MUL MULW DIVU A A A ...
Page 680: ...662 APPENDIX Table A 9 7 ea Instruction 2 first byte 71H ...
Page 681: ...663 APPENDIX A Instructions Table A 9 8 ea Instruction 3 first byte 72H ...
Page 682: ...664 APPENDIX Table A 9 9 ea Instruction 4 first byte 73H ...
Page 683: ...665 APPENDIX A Instructions Table A 9 10 ea Instruction 5 first byte 74H ...
Page 684: ...666 APPENDIX Table A 9 11 ea Instruction 6 first byte 75H ...
Page 685: ...667 APPENDIX A Instructions Table A 9 12 ea Instruction 7 first byte 76H ...
Page 686: ...668 APPENDIX Table A 9 13 ea Instruction 8 first byte 77H ...
Page 687: ...669 APPENDIX A Instructions Table A 9 14 ea Instruction 9 first byte 78H ...
Page 688: ...670 APPENDIX Table A 9 15 MOVEA RWi ea Instruction first byte 79H ...
Page 689: ...671 APPENDIX A Instructions Table A 9 16 MOV Ri ea Instruction first byte 7AH ...
Page 690: ...672 APPENDIX Table A 9 17 MOVW RWi ea Instruction first byte 7BH ...
Page 691: ...673 APPENDIX A Instructions Table A 9 18 MOV ea Ri Instruction first byte 7CH ...
Page 692: ...674 APPENDIX Table A 9 19 MOVW ea Rwi Instruction first byte 7DH ...
Page 693: ...675 APPENDIX A Instructions Table A 9 20 XCH Ri ea Instruction first byte 7EH ...
Page 694: ...676 APPENDIX Table A 9 21 XCHW RWi ea Instruction first byte 7FH ...
Page 710: ......