180
CHAPTER 4 I/O PORT
4.6.1
Registers for Port 4 (PDR4, DDR4)
The registers for port 4 are explained.
■
Function of Registers for Port 4
●
Port 4 data register (PDR4)
•
Port 4 data register indicates the state of the pins.
●
Port 4 direction register (DDR4)
•
The port 4 direction register sets the input/output directions.
•
When the bit corresponding to the pin is set to "1", port 1 functions as an output port. When the bit is set
to "0", port 1 functions as an input port.
Table 4.6-3 shows functions of the registers for port 4.
Table 4.6-3 Functions of the Registers for Port 4
Register
Name
Data
At Read
At Write
Read/
Write
Register
Address
Reset Value
Port 4 data
register
(PDR4)
0
The pin state is
Low level.
"0" is set for the output
latch, and when the pin is an
output port pin, the Low
level is output to the pin.
R/W
000004
H
XXXXXXXX
B
1
The pin state is
High level.
"1" is set for the output
latch, and when the pin is an
output port pin, the High
level is output to the pin.
Port 4
direction
register
(DDR4)
0
The direction
latch is" 0".
The output buffer is set to
"OFF", and the pin becomes
an input port pin.
R/W
000014
H
XXX00000
B
1
The direction
latch is "1".
The output buffer is set to
"ON", and the pin becomes
an output port pin
R/W: Read/Write
X: Undefined
Reference:
•
When using port 4 as the input pin of the resource, set the pin corresponding to the
resource in the DDR4 as an input port.
•
When using port 1 as the output pin of the resource, set the output of the corresponding
resource to enabled.Port 4 functions as the output pin of the resource regardless of the
settings of the DDR4.
Summary of Contents for F2MC-16LX Series
Page 2: ......
Page 3: ...FUJITSU LIMITED F2MC 16LX 16 bit Microcontroller MB90895 series Hardware Manual ...
Page 4: ......
Page 8: ...iv ...
Page 10: ...vi ...
Page 36: ...18 CHAPTER 2 HANDLING DEVICES ...
Page 176: ...158 CHAPTER 3 CPU ...
Page 224: ...206 CHAPTER 5 Timebase timer ...
Page 294: ...276 CHAPTER 8 16 bit reload timer ...
Page 366: ...348 CHAPTER 12 DTP external interrupt ...
Page 398: ...380 CHAPTER 13 8 10 bit A D converter ...
Page 446: ...428 CHAPTER 14 UART0 ...
Page 588: ...570 CHAPTER 17 Address Match Detecting Function ...
Page 626: ...608 CHAPTER 19 512 KBIT FLASH MEMORY ...
Page 676: ...658 APPENDIX Table A 9 3 Bit Operation Instruction Map first byte 6CH ...
Page 678: ...660 APPENDIX Table A 9 5 2 byte Instruction Map first byte 6FH MUL MULW DIVU A A A ...
Page 680: ...662 APPENDIX Table A 9 7 ea Instruction 2 first byte 71H ...
Page 681: ...663 APPENDIX A Instructions Table A 9 8 ea Instruction 3 first byte 72H ...
Page 682: ...664 APPENDIX Table A 9 9 ea Instruction 4 first byte 73H ...
Page 683: ...665 APPENDIX A Instructions Table A 9 10 ea Instruction 5 first byte 74H ...
Page 684: ...666 APPENDIX Table A 9 11 ea Instruction 6 first byte 75H ...
Page 685: ...667 APPENDIX A Instructions Table A 9 12 ea Instruction 7 first byte 76H ...
Page 686: ...668 APPENDIX Table A 9 13 ea Instruction 8 first byte 77H ...
Page 687: ...669 APPENDIX A Instructions Table A 9 14 ea Instruction 9 first byte 78H ...
Page 688: ...670 APPENDIX Table A 9 15 MOVEA RWi ea Instruction first byte 79H ...
Page 689: ...671 APPENDIX A Instructions Table A 9 16 MOV Ri ea Instruction first byte 7AH ...
Page 690: ...672 APPENDIX Table A 9 17 MOVW RWi ea Instruction first byte 7BH ...
Page 691: ...673 APPENDIX A Instructions Table A 9 18 MOV ea Ri Instruction first byte 7CH ...
Page 692: ...674 APPENDIX Table A 9 19 MOVW ea Rwi Instruction first byte 7DH ...
Page 693: ...675 APPENDIX A Instructions Table A 9 20 XCH Ri ea Instruction first byte 7EH ...
Page 694: ...676 APPENDIX Table A 9 21 XCHW RWi ea Instruction first byte 7FH ...
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