Fujitsu F2MC-16LX Series, Hardware Manual

Page: 212 / 710

194
CHAPTER 5 Timebase timer
5.2 Block Diagram of Timebase Timer
The timebase timer consists of the following blocks:
• Timebase timer counter
• Counter clear circuit
• Interval timer selector
• Timebase timer control register (TBTC)
■
Block Diagram of Timebase Timer
Figure 5.2-1 Block Diagram of Timebase Timer
The actual interrupt request number of the timebase timer is as follows:
Interrupt request number: #16 (10
H
)
2
1
/HCLK
Timebase timer counter
To watchdog
timer
Interval
timer selector
To clock control part
oscillation stabilization
waiting time selector
Counter clear
circuit
Power-on reset
Stop mode
CKSCR: MCS=1
→
0
*1
CKSCR: SCS=0
→
1
*2
Timebase timer interrupt signal
OF
OF
OF
OF
TBIE TBOF TBC1 TBC0 TBR
Timebase timer control register
(TBTC)
TBOF set
TBOF clear
Reserved
- -
OF : Over flow
HCLK : Oscillation clock
*1 : For switching machine clock from mainclock to PLL clock
*2 : For switching machine clock from sub clock to main clock
×
2
1 ×
2
2 ×
2
11 ×
2
12 ×
2
13 ×
2
14 ×
2
15 ×
2
16 ×
2
17 ×
2
18 ×
2
10 ×
2
9 ×
2
8 ×
2
3
To PPG timer