Freescale Semiconductor MSC8144E, Reference Manual

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MSC8144E Reference Manual, Rev. 3
16-156 Freescale Semiconductor
Serial RapidIO
®
Controller
16.6.49 Port 0 Serial Link Error Injection Configuration Register
(P0SLEICR)
P0SLEICR controls the injection of bit errors into the transmit bit stream and is used to generate
pseudo-random errors into the outbound serial RapidIO data stream. If the EIC field is non-zero,
error injection is enabled and, at pseudo-random intervals, an error is injected by inverting a
single bit in the outgoing data stream. The range of the pseudo-random value (delay between
injected errors) is controlled by the EIR field. That is, the value of EIR, multiplied by 32,
determines the maximum number of character times between injected errors.
P0SLEICR Port 0 Serial Link Error Injection Configuration Register Offset 0x10160
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
EIC — EIR
TYPE R/W R R/W
RESET 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
EIR
TYPE R/W
RESET 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Table 16-92. P0SLEICR Field Descriptions
Bit Reset Description Settings
EIC
31–27
0 Error Injection Control
Enables and controls serial link error injection as
follows. 00000 Error injection is disabled.
10000 Error injection, lane 0 only.
01000 Error injection, lane 1 only
00100 Error injection, lane 2 only
00010 Error injection, lane 3 only
11110 Error injection, all lanes
simultaneously
11111 Error injection, randomly
distributed over all 4 lanes
All other values reserved.
—
26–20
0 Reserved. Write to zero for future compatibility.
EIR
19–0
0 Error Injection Range
The value of EIR
×
32 determines the maximum value
of the pseudo-random delay between errors. For
example, a value of 0x1 indicates a maximum delay of
32 character times. The value within this register
should be right-justified.