Infineon Technologies TC1784, Руководство пользователя

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TC1784
Peripheral Control Processor (PCP)
User´s Manual 10-35 V1.1, 2011-05
PCP, V2.09
10.6.1 Issuing Service Requests to CPU or PCP
The PCP may use one of two mechanisms to raise an interrupt request to the CPU or
itself. The first, and most inefficient, method for a PCP channel program is to issue
service requests by performing an FPI Bus write operation to an external service request
node (SRN). Alternately, the PCP can raise a service request using one of its own
internal SRNs. An interrupt can only be generated by the PCP via an internal SRN when
executing an EXIT instruction, or when an error condition occurs. In the following
descriptions, PCP service requests triggered through an EXIT instruction or the
occurrence of an error are called “implicit” PCP service requests to distinguish them from
the “explicit” way of generating a service request through an FPI Bus write to a service
request node external to the PCP.
10.6.2 PCP Interrupt Control Unit
The PICU operates in a similar manner to the ICU of the CPU. The PICU manages the
PCP service request arbitration bus, and handles the communication of service requests
and priority numbers to and from the PCP kernel. The PCP_ICR register is provided to
control and monitor the arbitration process.
When one or more service requests to the PCP are activated, the PICU performs an
arbitration round to determine the request with the highest priority. It then places the
priority number of this “winning” service request into the PIPN field of register PCP_ICR,
and generates a service request to the PCP kernel.
If the PCP kernel is currently busy processing a channel program, the new request is left
pending until the current channel program has finished.
When the PCP kernel is ready to accept a new service request, it calculates the context
start address from the Pending Interrupt Priority Number, PIPN, stored in register ICR,
and begins with the context restore. It notifies the PICU of the acceptance of this request,
and in turn the PICU acknowledges the winner of the last arbitration round. This service
request node then resets its Service Request Flag, SRR.
There is one special condition in which the PICU operates differently from the way that
the CPU Interrupt Control Unit operates. This special operation is described on
Page 38 .
The PCP interrupt arbitration can be adapted to the application’s needs and
characteristics through controls in register PCP_ICR. Bit field PCP_ICR.PARBCYC
controls the number of arbitration cycles per arbitration round (one through four cycles),
while bit PCP_ICR.PONECYC controls whether one arbitration cycle equals one or two
system (FPI Bus) clock cycles.
10.6.3 PCP Service Request Nodes
The PCP contains twelve service request nodes, including twelve service request control
registers, PCP_SRC0 to PCP_SRC11, which are provided for implicit PCP service
requests. The service request control registers differ from standard SRC registers in that