UART/Autobaud Configuration Example
12-51
UART Devices
12.6.1 UART SW Reset
T
he goal is to clear IER and MCR registers, remove UART breaks (LCR[6] =
0), and put the module in reset (MDR1[2:0] = 0x3).
1) To write into both the IER and MCR registers, set EFR[4] to 1.
2) To enable access to the EFR register, write 0xBF to the LCR register:
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LCR = 0xBF
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EFR[4] = 1
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LCR = 0x80 (access to IER and MCR allowed)
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IER = 0x00
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MCR = 0x00
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LCR[6] = 0 (UART breaks removed)
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MDR1 = 0x03 (UART in reset)
12.6.2 UART FIFO Configuration
The goal is to set trigger level for halt/restore (TCR register), set trigger level
for transmit/receive (TLR register), and configure the FIFO (FCR register).
Procedure:
1) To write into both the TLR and TCR registers, set EFR[4] and MCR[6] to
1. To write into FCR, set EFR[4] to 1. Notice that EFR[4] = 1 has already
been done in the software reset, so a simple write to MCR[6] is necessary.
2) Set TCR TLR and FCR to the desired value.
3) Disable accesses to TCR, TLR, and FCR to avoid any further undesired
write to these registers:
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LCR = 0xBF (provides EFR access)
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EFR[4] = 0
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LCR[7] = 0
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MCR[6] = 0
12.6.3 Baud Rate Data and Stop Configurations
The goal is to configure UART data, stop (LCR register) baud rate (DLH and
DLL registers), and enable UART operation. If needed, you can add interrupt
capability configuration right before UART enable.
1) Input clock is 12 MHz, so set OSC_12M_SEL to 1.
2) Set LCR to desired value.
3) Set LCR[7] to 1 (access to DLH and DLL registers).
4) Set DLH and DLL LCR[7] = 0 (remove access to DLH and DLL registers).
5) Set IER to desired value (set interrupts).
6) MDR1[2:0] = 0
7) Enable UART without autobauding.
