OMAP5910 Local Bus MMU
14-110
The LB MMU RAM registers provide information on the physical address asso-
ciated with a CAM entry that defines a page of memory in the local bus virtual
address space.
Table 14–61. Local Bus MMU RAM High Register
Access
Hardware
Reset
Bit
Name
Function
User
Sup
Reset
Value
15–0
Ram_MSB
Most significant 16 bits of the physical
address that corresponds to a local
bus virtual address
R/W
R/W
0
Table 14–62. Local Bus MMU RAM Low Register
Access
Hardware
Reset
Bit
Name
Value
Function
User
Sup
Reset
Value
15–10
Ram_LSB
Least significant six bits of the physical
address that corresponds to a local bus virtual
address
R/W
R/W
0
9–8
AP
Access permission bits
R/W
R/W
0
00
No access. Any local bus access to this page
causes a permission fault.
01
No access. Any local bus access to this page
causes a permission fault.
10
Read access only. Any local bus write access
to this page causes a permission fault
11
Full access. Any local bus access to this page
can complete without a permission fault.
7–0
Unused