Samsung S5PC100, Руководство пользователя

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SD/MMC CONTROLLER S5PC100 USER’S MANUAL (REV1.0)
8.12-52
9.17 NORMAL INTERRUPT STATUS REGISTER
Normal Interrupt Status Register
•
NORINTSTS0, ROC/RW1C, Address = 0xED80_0030
•
NORINTSTS1, ROC/RW1C, Address = 0xED90_0030
•
NORINTSTS2, ROC/RW1C, Address = 0xEDA0_0030
The Normal Interrupt Status Enable affects reads of this register, but Normal Interrupt Signal Enable does not
affect these reads. An interrupt is generated if the Normal Interrupt Signal Enable is enabled and at least one of
the status bits is set to 1. For all bits except Card Interrupt and Error Interrupt, writing 1 to a bit clears it; writing 0
keeps the bit unchanged. More than one status is cleared with a single register write. The Card Interrupt is
cleared if the card stops asserting the interrupt; that is, if the Card Driver services the interrupt condition.
NORINTSTS Bit Description Reset Value
STAERR [15] Error Interrupt
If any of the bits in the Error Interrupt Status register are set, then this
bit is set. Therefore the Host Driver checks this bit first to efficiently
tests for an error. This bit is read only. (ROC)
'0' = No Error
'1' = Error
0
STAFIA3 [14] FIFO SD Address Pointer Interrupt 3 Status (RW1C)
'0' = Occurred
'1' = Not Occurred
If the FIFO Address of the SD clock side reaches the FIFO Interrupt
Address register 3 values, this status bit is asserted.
0
STAFIA2 [13] FIFO SD Address Pointer Interrupt 2 Status (RW1C)
'0' = Occurred
'1' = Not Occurred
If the FIFO Address of the SD clock side reaches the FIFO Interrupt
Address register 2 values, this status bit is asserted.
0
STAFIA1 [12]
FIFO SD Address Pointer Interrupt 1 Status (RW1C)
'0' = Occurred
'1' = Not Occurred
If the FIFO Address of the SD clock side reaches the FIFO Interrupt
Address register 1 value, this status bit is asserted.
0
STAFIA0 [11]
FIFO SD Address Pointer Interrupt 0 Status (RW1C)
'0' = Occurred
'1' = Not Occurred
If the FIFO Address of the SD clock side reaches the FIFO Interrupt
Address register 0 value, this status bit is asserted.
0
STARWAIT [10]
Read Wait Interrupt Status (RW1C)
'0' = Read Wait Interrupt Not Occurred
'1' = Read Wait Interrupt Occurred
Note: After checking response for the suspend command, release
0