S5PC100 USER’S MANUAL (REV1.0)
3D-ACCELERATOR
9.6-3
1.3 SPECIAL FUNCTION REGISTER SUMMARY (GLOBAL)
Register
Address
R/W
Description
Reset Value
GB_PIPESTATE 0x0000_0000
R
The
status of pipeline
0x00000000
GB_CACHECTL 0x0000_0004
R/W Cache
control register
0x00000000
GB_RST
0x0000_0008
W
The SW reset control
0x00000000
GB_INTPENDING 0x0000_0040
R/W Interrupt Pending Register
0x00000000
GB_INTMASK 0x0000_0044
R/W Enables
of
Disables interrupts.
0x00000000
GB_PIPEMASK 0x0000_0048
R/W Specifies
the
blocks in 3D-ACCELERATOR which
are candidates to generate interrupts. The bit
position of each block is as same as that of
GB_PIPESTATE.
0x00000000
GB_PIPETGTSTATE 0x0000_004C R/W Specifies
the
value of pipeline-state when interrupts
are to occur. When GB_PIPESTATE becomes
GB_PIPETGTSTATE, an interrupt occurs.
0x00000000
GB_PIPEINTSTATE 0x0000_0050 R/W Captures
the first pipeline-state when several
interrupts occur.
0x00000000
1.4 SPECIAL FUNCTION REGISTER SUMMARY (HI)
Register
Address
R/W
Description
Reset Value
HI_DWSPACE
0x0000_8000
R
The number of empty slots of the FIFO in HI.
0x00000000
HI_CONTROL 0x0000_8008
R/W Host
interface control register.
0x00010000
HI_IDXOFFSET 0x0000_800C
R/W Index
offset register (signed value)
0x00000001
HI_VBADDR
0x0000_8010
R/W Vertex Buffer Address
0x00000000
HI_ATTRIB0 0x0000_8040
R/W Input
attribute 0 control register
0x800000E4
HI_ATTRIB1 0x0000_8044
R/W Input
attribute 1 control register
0x800000E4
HI_ATTRIB2 0x0000_8048
R/W Input
attribute 2 control register
0x800000E4
HI_ATTRIB3 0x0000_804C
R/W Input
attribute 3 control register
0x800000E4
HI_ATTRIB4 0x0000_8050
R/W Input
attribute 4 control register
0x800000E4
HI_ATTRIB5 0x0000_8054
R/W Input
attribute 5 control register
0x800000E4
HI_ATTRIB6 0x0000_8058
R/W Input
attribute 6 control register
0x800000E4
HI_ATTRIB7 0x0000_805C
R/W Input
attribute 7 control register
0x800000E4
HI_ATTRIB8 0x0000_8060
R/W Input
attribute 8 control register
0x800000E4
HI_ATTRIB9 0x0000_8064
R/W Input
attribute 9 control register
0x800000E4
HI_ATTRIB0_VBCTRL 0x0000_8080 R/W Vertex
buffer
control of input attribute 0
0x00000000
HI_ATTRIB1_VBCTRL 0x0000_8084 R/W Vertex
buffer
control of input attribute 1
0x00000000
HI_ATTRIB2_VBCTRL 0x0000_8088 R/W Vertex
buffer
control of input attribute 2
0x00000000
HI_ATTRIB3_VBCTRL 0x0000_808C R/W Vertex
buffer control of input attribute 3
0x00000000
HI_ATTRIB4_VBCTRL 0x0000_8090 R/W Vertex
buffer
control of input attribute 4
0x00000000
Содержание S5PC100
Страница 1: ...USER S MANUAL S5PC100 June 2009 REV 1 01 Copyright 2009 Samsung Electronics Inc All Rights Reserved ...
Страница 13: ...PRODUCT OVERVIEW S5PC100 USER S MANUAL REV1 0 1 1 10 16 level alpha blending ITU BT601 656 format output ...
Страница 21: ...MEMORY MAP S5PC100 USER S MANUAL REV1 0 1 2 2 ...
Страница 33: ...BALL MAP SIZE POP S5PC100 USER S MANUAL REV1 0 1 1 8 VSS_HPLL AA12 VSSQ_UOTG AA19 VSS_UOTG AF21 VSS_ADC Y24 ...
Страница 34: ...S5PC100 USER S MANUAL REV1 0 BALL MAP SIZE POP 1 1 9 1 4 MCP CONNECTION ...
Страница 49: ...IROM CODE S5PC100 USER S MANUAL REV1 0 2 6 4 12 Mhz 300 0 Mhz 100 0 Mhz 79 5 Mhz 20 6 Mhz ...
Страница 159: ...S5PC100 USER S MANUAL REV1 0 CLOCK CONTROLLER 2 3 9 Figure 2 3 3 S5PC100 Clock Generation Circuit1 ...
Страница 174: ...CLOCK CONTROLLER S5PC100 USER S MANUAL REV1 0 2 3 24 Rs 0ohm Rf 1Mohm CL 10 35pF ...
Страница 322: ...CORESIGHT S5PC100 USER S MANUAL REV1 0 3 2 4 Figure 3 2 2 S5PC100 Coresight Structure ...
Страница 328: ...CORESIGHT S5PC100 USER S MANUAL REV1 0 3 2 10 Figure 3 2 6 Structure of the Coresight DAP Components ...
Страница 330: ...CORESIGHT S5PC100 USER S MANUAL REV1 0 3 2 12 Figure 3 2 7 ETB Block Diagram ...
Страница 345: ...S5PC100 USER S MANUAL REV1 0 ASYNC BRIDGE 3 4 3 Figure 3 4 2 Asynchronous Bridge Components ...
Страница 359: ...S5PC100 USER S MANUAL REV1 0 VECTORED INTERRUPT CONTROLLER 4 1 3 Figure 4 1 2 VIC Daisy Chain ...
Страница 524: ...S5PC100 USER S MANUAL REV1 0 CF CONTROLLER 5 5 29 48 DO9 Data 9 CF_D 9 49 D10 Data 10 CF_D 10 50 GND Ground ...
Страница 545: ...EXTERNAL BUS INTERFACE S5PC100 USER S MANUAL REV1 0 5 6 2 3 BLOCK DIAGRAM Figure 5 6 1 Memory Interface Through EBI ...
Страница 651: ...S5PC100 USER S MANUAL REV1 0 UART 8 1 27 Figure 8 1 10 UINTSP UINTP and UINTM block diagram ...
Страница 652: ...UART S5PC100 USER S MANUAL REV1 0 8 1 28 NOTES ...
Страница 743: ...S5PC100 USER S MANUAL REV1 0 MIPI HSI INTERFACE CONTROLLER 8 6 13 ...
Страница 756: ...MIPI HSI INTERFACE CONTROLLER S5PC100 USER S MANUAL REV1 0 8 6 26 NOTES ...
Страница 800: ...MIPI CSIS S5PC100 USER S MANUAL REV1 0 8 8 10 NOTES ...
Страница 816: ...USB HOST CONTROLLER S5PC100 USER S MANUAL REV1 0 8 9 16 ...
Страница 926: ...MODEM INTERFACE S5PC100 USER S MANUAL REV1 0 8 11 4 4 ADDRESS MAPPING Figure 8 11 2 MODEM I F Address Mapping ...
Страница 935: ...S5PC100 USER S MANUAL REV1 0 MODEM INTERFACE 8 11 13 NOTES ...
Страница 1019: ...S5PC100 USER S MANUAL REV1 0 DISPLAY CONTROLLER 9 1 5 Figure 9 1 2 Block Diagram of the Data Flow ...
Страница 1110: ...IMAGE ROTATOR S5PC100 USER S MANUAL REV1 0 9 2 2 3 1 ORIGINAL IMAGE 3 2 FLIP VERTICAL 3 3 FLIP HORIZONTAL ...
Страница 1111: ...S5PC100 USER S MANUAL REV1 0 IMAGE ROTATOR 9 2 3 3 4 180 DEGREE ROTATION ...
Страница 1112: ...IMAGE ROTATOR S5PC100 USER S MANUAL REV1 0 9 2 4 3 5 90 AND 270 DEGREE ROTATION ...
Страница 1118: ...S5PC100 USER S MANUAL REV1 0 CAMERA INTERFACE 9 3 3 Figure 9 3 2 Camera Interface Overview ...
Страница 1181: ...JPEG S5PC100 USER S MANUAL REV1 0 9 4 6 Figure 9 4 5 YCbCr4 2 2 Color Format ...
Страница 1199: ...JPEG S5PC100 USER S MANUAL REV1 0 9 4 24 NOTES ...
Страница 1245: ...3D ACCELERATOR S5PC100 USER S MANUAL REV1 0 9 6 18 ...
Страница 1310: ...S5PC100 USER S MANUAL REV1 0 3D ACCELERATOR 9 6 83 Figure 9 6 18 Per Fragment Function Block Diagram ...
Страница 1321: ...3D ACCELERATOR S5PC100 USER S MANUAL REV1 0 9 6 94 Interface with AXI Bus FIMG_3DSEV1 1 AXI DMA support AMBA AXI BUS protocol ...
Страница 1353: ...TVOUT VIDEO DAC S5PC100 USER S MANUAL REV1 0 9 7 32 ...
Страница 1452: ...S5PC100 USER S MANUAL REV1 0 VIDEO PROCESSOR 9 8 43 NOTES ...
Страница 1482: ...MIXER S5PC100 USER S MANUAL REV1 0 9 9 30 NOTES ...
Страница 1584: ...MFC MULTI FORMAT CODEC S5PC100 USER S MANUAL REV1 0 9 11 16 5 2 ENCODING FLOW Figure 9 11 11 Encoding Flow ...
Страница 1664: ...S5PC100 USER S MANUAL REV1 0 I2S CONTROLLER 5 1CH 10 2 31 NOTES ...
Страница 1701: ...AC97 CONTROLLER S5PC100 USER S MANUAL REV1 0 10 4 18 NOTES ...
Страница 1731: ...SPDIF TRANSMITTER S5PC100 USER S MANUAL REV1 0 10 6 16 NOTES ...
Страница 1744: ...S5PC100 USER S MANUAL REV1 0 ADC AND TOUCH SCREEN INTERFACE 10 7 13 NOTES ...
Страница 1750: ...KEYPAD INTERFACE S5PC100 USER S MANUAL REV1 0 10 8 6 Figure 10 8 7 Keypad I F Block Diagram ...
Страница 1755: ...S5PC100 USER S MANUAL REV1 0 KEYPAD INTERFACE 10 8 11 NOTES ...
Страница 1779: ...SECURE DOMAIN MANAGER S5PC100 USER S MANUAL REV1 0 11 2 22 NOTES ...
Страница 1841: ...S5PC100 USER S MANUAL REV1 0 ELECTRICAL DATA 12 1 9 EXTCLK tRESW nRESET Figure 12 1 4 Manual Reset Input Timing ...
Страница 1846: ...ELECTRICAL DATA S5PC100 USER S MANUAL REV1 0 12 1 14 6 ONENAND AC ELECTRICAL CHARACTERISTICS Figure 12 1 7 OneNand Flash Timing ...