Samsung S5PC100, Руководство пользователя

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USB2.0 HS OTG S5PC100 USER’S MANUAL (REV1.0)
8.10 -62
8.2.38 Device ALL Endpoints Interrupt Register (DAINT, R, Address = 0xED20_0818)
If a significant event occurs on an endpoint, a Device All Endpoints Interrupt register interrupts the application
using the Device OUT Endpoints Interrupt bit or Device IN Endpoints Interrupt bit of the Core Interrupt register.
There is one interrupt bit per endpoint, up to a maximum of 16 bits for OUT endpoints and 16 bits for IN
endpoints. For a bidirectional endpoint, the corresponding IN and OUT interrupt bits are used. Bits in this register
are set and cleared if the application sets and clears bits in the corresponding Device Endpoint
−
n Interrupt
register.
DAINT Bit Description R/W Reset Value
OutEPInt [31:16] OUT Endpoint Interrupt Bits
One bit per OUT endpoint :
Bit 16 for OUT endpoint 0, bit 31 for OUT endpoint 15
R 16'h0
InEpInt [15:0] IN Endpoint Interrupt Bits
One bit per IN endpoint :
Bit 0 for IN endpoint 0, bit 15 for endpoint 15
R 16'h0
8.2.39 Device ALL Endpoints Interrupt Mask Register (DAINTMSK, R/W, Address = 0xED20_081C)
The Device Endpoint Interrupt Mask register works with the Device Endpoint Interrupt register to interrupt the
application if an event occurs on a device endpoint. However, the Device all Endpoints Interrupt register bit
corresponding to that interrupt remains set.
•
Mask interrupt : 1'b0
•
Unmask interrupt : 1'b1
DAINTMSK Bit Description R/W Reset Value
OutEPMsk [31:16] OUT EP Interrupt Mask Bits
One bit per OUT endpoint :
Bit 16 for OUT EP 0, bit 31 for OUT EP 15
R/W 16'h0
InEpMsk [15:0] IN EP Interrupt Mask Bits
One bit per IN endpoint :
Bit 0 for IN EP 0, bit 15 for IN EP 15 R/W 16'h0