NXP Semiconductors LCP43 Series, User Manual

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User manual Rev. 1.3 — 6 July 2012 956 of 1269
NXP Semiconductors
UM10503
Chapter 37: LPC43xx USART0_2_3
If the IntStatus bit is one and no interrupt is pending and the IntId bits will be zero. If the
IntStatus is 0, a non auto-baud interrupt is pending in which case the IntId bits identify the
type of interrupt and handling as described in
Table 828 . Given the status of IIR[3:0], an
interrupt handler routine can determine the cause of the interrupt and how to clear the
active interrupt. The IIR must be read in order to clear the interrupt prior to exiting the
Interrupt Service Routine.
The USART RLS interrupt (IIR[3:1] = 011) is the highest priority interrupt and is set
whenever any one of four error conditions occur on the USART RX input: overrun error
(OE), parity error (PE), framing error (FE) and break interrupt (BI). The USART Rx error
condition that set the interrupt can be observed via LSR[4:1]. The interrupt is cleared upon
a LSR read.
The USART RDA interrupt (IIR[3:1] = 010) shares the second level priority with the CTI
interrupt (IIR[3:1] = 110). The RDA is activated when the USART Rx FIFO reaches the
trigger level defined in FCR7:6 and is reset when the USART Rx FIFO depth falls below
the trigger level. When the RDA interrupt goes active, the CPU can read a block of data
defined by the trigger level.
The CTI interrupt (IIR[3:1] = 110) is a second level interrupt and is set when the USART
Rx FIFO contains at least one character and no USART Rx FIFO activity has occurred in
3.5 to 4.5 character times. Any USART Rx FIFO activity (read or write of USART RSR) will
clear the interrupt. This interrupt is intended to flush the USART RBR after a message has
been received that is not a multiple of the trigger level size. For example, if a peripheral
wished to send a 105 character message and the trigger level was 10 characters, the
CPU would receive 10 RDA interrupts resulting in the transfer of 100 characters and 1 to 5
CTI interrupts (depending on the service routine) resulting in the transfer of the remaining
5 characters.
Table 828. USART Interrupt Handling
IIR[3:0]
value
[1]
Priority Interrupt
type
Interrupt source Interrupt
reset
0001 - None None -
0110 Highest RX Line
Status /
Error
OE
[2]
or PE
[2]
or FE
[2]
or BI
[2]
LSR Read
[2]