NXP Semiconductors LCP43 Series, User Manual

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UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
User manual Rev. 1.3 — 6 July 2012 201 of 1269
NXP Semiconductors
UM10503
Chapter 14: LPC43xx Pin configuration
P7_5 A7 C7 - 191 133
[6]
N;
PU I/O GPIO3[13] — General purpose digital input/output pin.
O CTOUT_12 — SCT output 12. Match output 3 of timer 3.
- R — Function reserved.
O LCD_VD8 — LCD data.
O LCD_VD23 — LCD data.
O TRACEDATA[1] — Trace data, bit 1.
- R — Function reserved.
- R — Function reserved.
AI ADC0_3 — ADC0, input channel 3. Configure the pin as
GPIO input and use the ADC function select register in the
SCU to select the ADC.
P7_6 C7 F5 - 194 134
[3]
N;
PU I/O GPIO3[14] — General purpose digital input/output pin.
O CTOUT_11 — SCT output 1. Match output 3 of timer 2.
- R — Function reserved.
O LCD_LP — Line synchronization pulse (STN). Horizontal
synchronization pulse (TFT).
- R — Function reserved.
O TRACEDATA[2] — Trace data, bit 2.
- R — Function reserved.
- R — Function reserved.
P7_7 B6 D5 - 201 140
[6]
N;
PU I/O GPIO3[15] — General purpose digital input/output pin.
O CTOUT_8 — SCT output 8. Match output 0 of timer 2.
- R — Function reserved.
O LCD_PWR — LCD panel power enable.
- R — Function reserved.
O TRACEDATA[3] — Trace data, bit 3.
O ENET_MDC — Ethernet MIIM clock.
I/O SGPIO7 — General purpose digital input/output pin.
AI ADC1_6 — ADC1, input channel 6. Configure the pin as
GPIO input and use the ADC function select register in the
SCU to select the ADC.
Table 129. Pin description
…continued
LCD, Ethernet, USB0, and USB1 functions are not available on all parts.
Symbol
LB
GA25
6
TFBGA180 TFBGA100 LQ
FP2
08
[1
]
LQ
FP1
44
R
e
se
t st
ate
[2
]
Ty
p
e
Description