NXP Semiconductors LCP43 Series, User Manual

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UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
User manual Rev. 1.3 — 6 July 2012 255 of 1269
NXP Semiconductors
UM10503
Chapter 14: LPC43xx Pin configuration
P8_7 K1 J1 45
[3]
N;
PU I/O GPIO4[7] — General purpose digital input/output pin.
O USB1_ULPI_STP — ULPI link STP signal. Asserted to end or
interrupt transfers to the PHY.
- R — Function reserved.
O LCD_VD4 — LCD data.
O LCD_PWR — LCD panel power enable.
- R — Function reserved.
- R — Function reserved.
I T0_CAP3 — Capture input 3 of timer 0.
P8_8 L1 K1 49
[3]
N;
PU - R — Function reserved.
I USB1_ULPI_CLK — ULPI link CLK signal. 60 MHz clock generated
by the PHY.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
O CGU_OUT0 — CGU spare clock output 0.
O I2S1_TX_MCLK — I2S1 transmit master clock.
P9_0 T1 P1 59
[3]
N;
PU I/O GPIO4[12] — General purpose digital input/output pin.
O MCABORT — Motor control PWM, LOW-active fast abort.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
I ENET_CRS — Ethernet Carrier Sense (MII interface).
I/O SGPIO0 — General purpose digital input/output pin.
I/O SSP0_SSEL — Slave Select for SSP0.
P9_1 N6 P4 66
[3]
N;
PU I/O GPIO4[13] — General purpose digital input/output pin.
O MCOA2 — Motor control PWM channel 2, output A.
- R — Function reserved.
- R — Function reserved.
I/O I2S0_TX_WS — Transmit Word Select. It is driven by the master and
received by the slave. Corresponds to the signal WS in the I
2
S-bus
specification .
I ENET_RX_ER — Ethernet receive error (MII interface).
I/O SGPIO1 — General purpose digital input/output pin.
I/O SSP0_MISO — Master In Slave Out for SSP0.
Table 130. LPC4357/53 Pin description
…continued
Pin name
L
B
GA
256
TFBGA18
0
LQ
FP2
0
8
Re
set st
ate
[2
]
Ty
p
e
Description