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UM10503
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© NXP B.V. 2012. All rights reserved.
User manual
Rev. 1.3 — 6 July 2012
225 of 1269
NXP Semiconductors
UM10503
Chapter 14: LPC43xx Pin configuration
CLK0
N5
M4
K3
62
45
O;
PU
O
EMC_CLK0 —
SDRAM clock 0.
O
CLKOUT —
Clock output pin.
-
R —
Function reserved.
-
R —
Function reserved.
I/O
SD_CLK —
SD/MMC card clock.
O
EMC_CLK01 —
SDRAM clock 0 and clock 1 combined.
I/O
SSP1_SCK —
Serial clock for SSP1.
I
ENET_TX_CLK (ENET_REF_CLK) —
Ethernet Transmit
Clock (MII interface) or Ethernet Reference Clock (RMII
interface).
CLK1 T10
-
-
-
-
O;
PU
O
EMC_CLK1 —
SDRAM clock 1.
O
CLKOUT —
Clock output pin.
-
R —
Function reserved.
-
R —
Function reserved.
-
R —
Function reserved.
O
CGU_OUT0 —
CGU spare clock output 0.
-
R —
Function reserved.
O
I2S1_TX_MCLK —
I2S1 transmit master clock.
CLK2 D14
P10
K6
141 99
O;
PU
O
EMC_CLK3 —
SDRAM clock 3.
O
CLKOUT —
Clock output pin.
-
R —
Function reserved.
-
R —
Function reserved.
I/O
SD_CLK —
SD/MMC card clock.
O
EMC_CLK23 —
SDRAM clock 2 and clock 3 combined.
O
I2S0_TX_MCLK —
I2S transmit master clock.
I/O
I2S1_RX_SCK —
Receive Clock. It is driven by the
master and received by the slave. Corresponds to the
signal SCK in the I
2
S-bus specification.
CLK3 P12
-
-
-
-
O;
PU
O
EMC_CLK2 —
SDRAM clock 2.
O
CLKOUT —
Clock output pin.
-
R —
Function reserved.
-
R —
Function reserved.
-
R —
Function reserved.
O
CGU_OUT1 —
CGU spare clock output 1.
-
R —
Function reserved.
I/O
I2S1_RX_SCK —
Receive Clock. It is driven by the
master and received by the slave. Corresponds to the
signal SCK in the I
2
S-bus specification.
Debug pins
Table 129. Pin description
…continued
LCD, Ethernet, USB0, and USB1 functions are not available on all parts.
Symbol
LB
GA25
6
TFBGA180
TFBGA100
LQ
FP2
08
[1
]
LQ
FP1
44
R
e
se
t st
ate
[2
]
Ty
p
e
Description