UM10503
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© NXP B.V. 2012. All rights reserved.
User manual
Rev. 1.3 — 6 July 2012
1147 of 1269
NXP Semiconductors
UM10503
Chapter 43: LPC43xx I2C-bus interface
2. Set up the Slave Address to which data will be transmitted, and add the Write bit.
3. Write 0x20 to CONSET to set the STA bit.
4. Set up data to be transmitted in Master Transmit buffer.
5. Initialize the Master data counter to match the length of the message being sent.
6. Exit
43.11.3 Start Master Receive function
Begin a Master Receive operation by setting up the buffer, pointer, and data count, then
initiating a START.
1. Initialize Master data counter.
2. Set up the Slave Address to which data will be transmitted, and add the Read bit.
3. Write 0x20 to CONSET to set the STA bit.
4. Set up the Master Receive buffer.
5. Initialize the Master data counter to match the length of the message to be received.
6. Exit
43.11.4 I
2
C interrupt routine
Determine the I
2
C state and which state routine will be used to handle it.
1. Read the I
2
C status from STA.
2. Use the status value to branch to one of 26 possible state routines.
43.11.5 Non mode specific states
43.11.5.1 State: 0x00
Bus Error. Enter not addressed Slave mode and release bus.
1. Write 0x14 to CONSET to set the STO and AA bits.
2. Write 0x08 to CONCLR to clear the SI flag.
3. Exit
43.11.5.2 Master States
State 08 and State 10 are for both Master Transmit and Master Receive modes. The R/W
bit decides whether the next state is within Master Transmit mode or Master Receive
mode.
43.11.5.3 State: 0x08
A START condition has been transmitted. The Slave A R/W bit will be
transmitted, an ACK bit will be received.
1. Write Slave Address with R/W bit to DAT.
2. Write 0x04 to CONSET to set the AA bit.
3. Write 0x08 to CONCLR to clear the SI flag.
4. Set up Master Transmit mode data buffer.
