FSB Design Guidelines
R
Intel
®
855PM Chipset Platform Design Guide
89
Table 18. Processor and MCH FSB Signal Package Trace Lengths
Signal Group
CPU Signal Name
Processor Package Trace
Length (mils)
MCH Signal Name
MCH Package
Trace Length (mils)
SOURCE SYNCHRONOUS – DATA & ADDRESS SIGNALS
D[15:0]# 722 HD[15:0]#
851
DINV[0]# 722 DBI[0]#
851
DSTBP[0]# 722 HDSTBP[0]#
851
Data Group 1
DSTBN[0]# 722 HDSTBN[0]#
851
D[31:16]# 564 HD[31:16]#
958
DINV[1]# 564 DBI[1]#
958
DSTBP[1]# 564 HDSTBP[1]#
958
Data Group 2
DSTBN[1]# 564 HDSTBN[1]#
958
D[47:32]# 661 HD[47:32]#
760
DINV[2]# 661 DBI[2]#
760
DSTBP[2]# 661 HDSTBP[2]#
760
Data Group 3
DSTBN[2]# 661 HDSTBN[2]#
760
D[63:48]# 758 HD[63:48]#
709
DINV[3]# 758 DBI[3]#
709
DSTBP[3]# 758 HDSTBP[3]#
709
Data Group 4
DSTBN[3]# 758 H
DSTBN[3]#
709
REQ[4:0]# 616 HREQ[4:0]#
662
A[16:3]# 616 HA[16:3]#
662
Address
Group 1
ADSTB[0]# 616 HADSTB[0]#
662
A[31:17]# 773 HA[31:17]#
686
Address
Group 2
ADSTB[1]# 773 HADSTB[1]#
686
COMMON CLOCK SIGNALS
ADS# 454 ADS#
338
BNR# 506 BNR#
536
BPRI# 424 BPRI#
425
BR0# 336 BREQ0#
329
DBSY# 445 DBSY#
440
