Platform Power Delivery Guidelines
R
Intel
®
855PM Chipset Platform Design Guide
251
11.4.1.
Intel 82801DBM ICH4-M Power Sequencing Requirements
11.4.1.1.
3.3/1.5 V and 3.3/1.8 V Power Sequencing
No power sequencing requirements exist for the associated 3.3 V/1.5 V rails or the 3.3 V/1.8 V rail of
the ICH4-M. It is generally good design practice to power up the core before or at the same time as the
other rails.
11.4.1.2. V
5REF
/
3.3 V Sequencing
V
5REF
is the reference voltage for 5 V tolerance on inputs to the Intel 82801DBM ICH4-M. V
5REF
must
be powered up before V
CC3
_
3
, or after V
CC3
_
3
within 0.7 V. Also, V
5REF
must power down after V
CC3
_
3
,
or before V
CC3
_
3
within 0.7 V. It must also power down after or simultaneous to V
CC3
_
3
. These rules
must be followed in order to ensure the proper functionality of the ICH4-M. If the rule is violated,
internal diodes will attempt to draw power sufficient to damage the diodes from the V
CC3
_
3
rail. Figure
141 shows a sample implementation of how to satisfy the V
5REF
/ 3.3 V sequencing rule.
This rule also applies to the stand-by rails, but in most platforms, the V
CCSUS3
_
3
rail is derived from the
V
CCSUS5
and therefore, the V
CCSUS3
_
3
rail will always come up after the V
CCSUS5
rail. As a result,
V
5REF
_
SUS
will always be powered up before V
CCSUS3
_
3
. In platforms that do not derive the V
CCSUS3
_
3
rail
from the V
CCSUS5
rail, this rule must be comprehended in the platform design.
Figure 141. Example V
5REF
/ 3.3 V Sequencing Circuitry
11.4.1.3. V
5REF_SUS
Design Guidelines
The aforementioned rule for V
5REF
also applies to the V
5REF
_
SUS
input pin. However, in some platforms,
the V
CCSUS3
_
3
rail is derived from the V
CCSUS5
and therefore, the V
CCSUS3
_
3
rail will always come up after
the V
CCSUS5
rail. As a result, V
5REF
_
SUS
will always be powered up before V
CCSUS3
_
3
. In platforms where
the V
CCSUS3
_
3
rail is not derived from the V
CCSUS5
rail, the V
5REF
sequencing rule must be comprehended
in the platform design.
In order to meet reliability and testing requirements for the USB interface, the following design
recommendations for the V
5REF_SUS
pins of the ICH4-M should be followed. Changes to the USB
specification regarding continuous short conditions must be addressed. The USB 1.1 specification
