Analog Devices EZ-KIT Lite ADSP-BF506F, Hardware Reference Manual

Page: 1002 / 1310

Functional Description
21-30 ADSP-BF50x Blackfin Processor Hardware Reference
the
TX_ACT
flag upon starting a data transmit operation. During the data
transfer, the transmit logic maintains a number of transmit FIFO status
flags as shown in
Table 21-9 .
When the receive FIFO is disabled, all receive status flags are deasserted
and the receive read and write pointers are reset. The RSI asserts the
RX_ACT
flag upon starting a data read transaction. During the data transfer,
the receive logic maintains the receive FIFO status flags shown in
Table 21-10 .
Table 21-9. RSI Transmit FIFO Status Flags
RSI_STATUS Flag Description
TX_FIFO_STAT Transmit FIFO is half empty
TX_FIFO_FULL Transmit FIFO is full
TX_FIFO_EMPTY Transmit FIFO is empty
TX_UNDERRUN Transmit FIFO under run error
TX_DAT_RDY Valid data available in the transmit FIFO
Table 21-10. RSI Receive FIFO Status Flags
RSI_STATUS Flag Description
RX_FIFO_STAT Receive FIFO is half empty
RX_FIFO_FULL Receive FIFO is full
RX_FIFO_EMPTY Receive FIFO is empty
RX_OVERRUN Receive FIFO under run error
RX_DAT_RDY Valid data available in the receive FIFO