270
Inverter Positioning
Section 5-3
PULSE OUTPUT:
PLS2(887)
PLS2(887) outputs a specified number of pulses to the specified port. Pulse
output starts at a specified startup frequency, accelerates to the target fre-
quency at a specified acceleration rate, decelerates at the specified decelera-
tion rate, and stops at approximately the same frequency as the startup
frequency. Only independent mode positioning is supported.
PLS2(887) can also be executed during pulse output to change the number of
output pulses, target frequency, acceleration rate, or deceleration rate.
PLS2(887) can thus be used for sloped speed changes with different acceler-
ation and deceleration rates, target position changes, target and speed
changes, or direction changes.
M
Output mode
Bits 0 to 3
Mode
1 hex: Independent
Bits 4 to 7
Direction
0 hex: CW
1 hex: CCW
Bits 8 to 11
Not used: Always set to 0 hex.
Bits 9 to 15
Not used: Always set to 0 hex.
S
First word of
settings table
S
Acceleration/Deceleration Rate
1 to 65,535 Hz (0001 to FFFF hex)
S+1 (lower 4
digits)
Target Frequency in Hz
Pulse output 0 to 3: 0000 0000 to 0001 86A0
hex (0 to 100 kHz)
J models: 0000 0000 to 0000 4E20 hex (0 to
20 kHz)
S+2 (upper 4
digits)
Operand
Description
Operand
Description
P
Port specifier
0020 hex: Inverter positioning 0
0021 hex: Inverter positioning 1
M
Output mode
Bits 0 to 3
Mode
0 hex: Relative pulses
1 hex: Absolute pulses
Bits 4 to 7
Direction
0 hex: CW
1 hex: CCW
Bits 8 to 11
Not used: Always set to 0 hex.
Bits 9 to 15
Not used: Always set to 0 hex.
S
First word of
settings table
S1
Acceleration rate
0001 to FFFF hex (1 to
65,535 Hz)
Specify the increase or
decrease in the fre-
quency in Hz per pulse
control period (4 ms).
S1+1
Deceleration rate
0001 to FFFF hex (1 to
65,535 Hz)
S1+2 (lower 4
digits)
Target Frequency in Hz
Pulse output 0 or 1: 0000 0000 to 0001 86A0
hex (0 to 100 kHz)
J models: 0000 0000 to 0000 4E20 hex (0 to 20
kHz)
S1+3 (upper 4
digits)
S1+4 (lower 4
digits)
Number of Pulses
• Relative pulses: 0000 0000 to 7FFF FFFF hex
(0 to 2,147,489,647)
• Absolute pulses: 8000 0000 to 7FFF FFFF
hex (
−
2,147,489,648 to 2,147,489,647)
S1+5 (upper 4
digits)
PLS2(887)
P
M
S
F
M: Output mode
P: Port specifier
S: First word of settings table
F: First word of starting frequency
Summary of Contents for CP1L - 12-2007
Page 3: ...iv...
Page 9: ...x...
Page 13: ...xiv TABLE OF CONTENTS...
Page 21: ...xxii...
Page 33: ...xxxiv Conformance to EC Directives 6...
Page 65: ...32 Function Blocks Section 1 5...
Page 428: ...395 Clock Section 6 9...
Page 429: ...396 Clock Section 6 9...
Page 523: ...488 Troubleshooting Unit Errors Section 9 4...
Page 531: ...496 Replacing User serviceable Parts Section 10 2...
Page 563: ...528 Auxiliary Area Allocations by Function Appendix C...
Page 611: ...576 Auxiliary Area Allocations by Address Appendix D...
Page 638: ...603 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 639: ...604 Connections to Serial Communications Option Boards Appendix F...
Page 669: ...634 Index...
Page 671: ...636 Revision History...