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149
Data Registers
Section 4-12
Note
Be sure to use PLC memory addresses in Index Registers.
4-12 Data Registers
The sixteen Data Registers (DR0 to DR15) are used to offset the PLC mem-
ory addresses in Index Registers when addressing words indirectly.
The value in a Data Register can be added to the PLC memory address in an
Index Register to specify the absolute memory address of a bit or word in I/O
memory. Data Registers contain signed binary data, so the content of an
Index Register can be offset to a lower or higher address.
D1001 and D1000
stored in IR0
or
Actual memory address of
CIO 0 (0000C000 hex)
stored in IR0
Contents of IR0 stored in
D01001 and D01000
D02001 and D02000
stored in IR0
or
Actual memory address
CIO 5 (0000C005 hex)
stored in IR0
Contents of IR0 stored in
D02001 and D02000
Peripheral servicing
Read D01001
and D01000
Read D02001
and D02000
IR storage words for task 2
IR storage words for task 1
or
or
Task 1
Task 2
Summary of Contents for CP1L - 12-2007
Page 3: ...iv...
Page 9: ...x...
Page 13: ...xiv TABLE OF CONTENTS...
Page 21: ...xxii...
Page 33: ...xxxiv Conformance to EC Directives 6...
Page 65: ...32 Function Blocks Section 1 5...
Page 428: ...395 Clock Section 6 9...
Page 429: ...396 Clock Section 6 9...
Page 523: ...488 Troubleshooting Unit Errors Section 9 4...
Page 531: ...496 Replacing User serviceable Parts Section 10 2...
Page 563: ...528 Auxiliary Area Allocations by Function Appendix C...
Page 611: ...576 Auxiliary Area Allocations by Address Appendix D...
Page 638: ...603 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 639: ...604 Connections to Serial Communications Option Boards Appendix F...
Page 669: ...634 Index...
Page 671: ...636 Revision History...