Omron CP1L - 12-2007, Operation Manual

Page: 644 / 673

609
PLC Setup
Appendix G
Serial Port 1 Settings
Serial Communications Settings
Name Default Settings When setting is read
by CPU Unit
Internal
address
Bits Settings
1 Communications Settings Standard
(9600; 1,7,2,E) Standard (9600; 1,7,2,E)
(The standard settings
are as follows: 9,600
baud, 1 start bit, 7-bit
data, even parity, and 2
stop bits.) Every cycle 144
(CP1L M-
type CPU
Unit) 15 0
160
(CP1L L-
type CPU
Unit)
Custom 1
2 Mode Host Link Host Link Every cycle 144
(CP1L M-
type CPU
Unit) 08 to
11 0 hex
5 hex
NT Link (1:N) 2 hex
RS-232C 160
(CP1L L-
type CPU
Unit) 3 hex
ToolBus (peripheral bus) 4 hex
Serial Gateway 9 hex
PC Link (Slave) 7 hex
PC Link (Master) 8 hex
2-1 Host Link
2-1-1 Baud 9,600 bps 300 bps Every cycle 145
(CP1L M-
type CPU
Unit) 00 to
07 01 hex
600 bps 02 hex
1,200 bps 03 hex
2,400 bps 161
(CP1L L-
type CPU
Unit) 04 hex
4,800 bps 05 hex
9,600 bps 00 or
06 hex
19,200 bps 07 hex
38,400 bps 08 hex
57,600 bps 09 hex
115,200 bps 0A hex
2-1-2 Format
(data
length,
stop bits,
parity) 7,2,E: 7-bit
data, 2 stop
bits, even parity 7,2,E: 7-bit data, 2 stop
bits, even parity Every cycle 144
(CP1L M-
type CPU
Unit) 00 to
03 0 hex
7,2,O: 7-bit data, 2 stop
bits, odd parity 1 hex
7,2,N: 7-bit data, 2 stop
bits, no parity 2 hex
7,1,E: 7-bit data, 2 stop
bits, even parity 160
(CP1L L-
type CPU
Unit) 4 hex
7,1,O: 7-bit data, 1 stop
bit, odd parity 5 hex
7,1,N: 7-bit data, 1 stop
bit, no parity 6 hex
8,2,E: 8-bit data, 2 stop
bits, even parity 8 hex
8,2,O: 8-bit data, 2 stop
bits, odd parity 9 hex
8,2,N: 8-bit data, 2 stop
bits, no parity A hex
8,1,E: 8-bit data, 1 stop
bit, even parity C hex
8,1,O: 8-bit data, 1 stop
bit, odd parity D hex
8,1,N: 8-bit data, 1 stop
bit, no parity E hex