166
High-speed Counters
Section 5-1
Input Terminal Arrangement for CPU Units with 40 I/O Point
Input Function Settings in the PLC Setup
The CPU Unit’s built-in inputs can be set for use as high-speed counter inputs
in the PLC Setup’s Built-in Input Tab using the CX-Programmer. (When an
input is set for use as a high-speed counter input, the corresponding words
and bits cannot be used for general-purpose (normal) inputs, input interrupts,
or quick-response inputs.)
CPU Units with 14 I/O Points
CO M
L1
L2/N
01
00
02
04
03
05
07
06
09
08
11
10
01
03
05
07
09
11
00
02
04
06
08
10
High-speed counter 1
(Phase Z or Reset input)
High-speed counter 3
(Increment)
Upper Terminal Block
(Example: AC Power
Supply Modules)
High-speed counter 1
(Increment)
High-speed counter 0
(Increment)
High-speed counter 2
(Increment)
High-speed counter 1
(Phase Z or Reset input)
High-speed counter 2
(Phase Z or Reset input)
High-speed counter 0
(Phase Z or Reset input)
Input terminal
block
Default setting
High-speed counter operation setting
Origin search
setting
Word
Bit
Single-phase
(increment pulse input)
Two-phase (differential
phases x4, up/down, or
pulse/direction)
CIO 0
00
Normal input 0
High-speed counter 0
(Increment)
High-speed counter 0
(Phase A, Increment, or
Count input)
---
01
Normal input 1
High-speed counter 1
(Increment)
High-speed counter 0
(Phase B, Decrement, or
Direction input)
---
02
Normal input 2
High-speed counter 2
(Increment)
High-speed counter 1
(Phase A, Increment, or
Count input)
Pulse output 0:
Origin proximity input
signal
03
Normal input 3
High-speed counter 3
(Increment)
High-speed counter 0
(Phase B, Decrement, or
Direction input)
Pulse output 1:
Origin proximity input
signal
04
Normal input 4
High-speed counter 0
(Phase Z or reset input)
High-speed counter 0
(Phase Z or reset input)
---
05
Normal input 5
High-speed counter 1
(Phase Z or reset input)
High-speed counter 1
(Phase Z or reset input)
---
06
Normal input 6
High-speed counter 2
(Phase Z or reset input)
---
Pulse output 0:
Origin input signal
07
Normal input 7
High-speed counter 3
(Phase Z or reset input)
---
Pulse output 1:
Origin input signal
Summary of Contents for CP1L - 12-2007
Page 3: ...iv...
Page 9: ...x...
Page 13: ...xiv TABLE OF CONTENTS...
Page 21: ...xxii...
Page 33: ...xxxiv Conformance to EC Directives 6...
Page 65: ...32 Function Blocks Section 1 5...
Page 428: ...395 Clock Section 6 9...
Page 429: ...396 Clock Section 6 9...
Page 523: ...488 Troubleshooting Unit Errors Section 9 4...
Page 531: ...496 Replacing User serviceable Parts Section 10 2...
Page 563: ...528 Auxiliary Area Allocations by Function Appendix C...
Page 611: ...576 Auxiliary Area Allocations by Address Appendix D...
Page 638: ...603 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 639: ...604 Connections to Serial Communications Option Boards Appendix F...
Page 669: ...634 Index...
Page 671: ...636 Revision History...