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68
CP1L CPU Unit Operation
Section 2-3
Reading from a Memory Cassette
Data
Method
Destination
User program and
parameter data
This data is transferred by
turning SW2 on the DIP
switch to ON and turning ON
the power supply.
Data in the Memory Cassette
is transferred to RAM and
then automatically transferred
to the built-in flash memory.
Comment memory
and function block
source data
Data is transferred to the built-
in flash memory.
DM Area data
DM Area data originally from
the built-in flash memory is
transferred back to the flash
memory and DM Area data
originally from RAM is trans-
ferred to RAM.
RAM
DM Area
data from RAM
User program
area
Parameter
area
I/O memory area
DM Area
Battery
Backup
Built-in flash memory
Power turned ON with SW2 turned ON
Parameter area
DM Area initial
values
Comment
memory area
FB source
memory area
Memory Cassette
User program
area
Parameter area
DM Area initial
values
Comment
memory area
FB source
memory area
CPU Unit
FB = Function block
User program
area
Summary of Contents for CP1L - 12-2007
Page 3: ...iv...
Page 9: ...x...
Page 13: ...xiv TABLE OF CONTENTS...
Page 21: ...xxii...
Page 33: ...xxxiv Conformance to EC Directives 6...
Page 65: ...32 Function Blocks Section 1 5...
Page 428: ...395 Clock Section 6 9...
Page 429: ...396 Clock Section 6 9...
Page 523: ...488 Troubleshooting Unit Errors Section 9 4...
Page 531: ...496 Replacing User serviceable Parts Section 10 2...
Page 563: ...528 Auxiliary Area Allocations by Function Appendix C...
Page 611: ...576 Auxiliary Area Allocations by Address Appendix D...
Page 638: ...603 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 639: ...604 Connections to Serial Communications Option Boards Appendix F...
Page 669: ...634 Index...
Page 671: ...636 Revision History...