379
Memory Cassette Functions
Section 6-6
• If a Memory Cassette is not mounted, data will be read from the flash
memory built into the CPU Unit to start operation regardless of the setting
of DIP switch pin SW2.
• CP1L CPU Units with 14 or 20 I/O points. do not have D10000 to D31999.
These words will be treated as follows when data from a CPU Unit with 14
or 20 I/O points is transferred to a CPU Unit with 30 or 40 I/O points or
visa versa.
6-6-5
Procedures for Automatic Transfer from the Memory Cassette at
Startup
Copying the System
Use the following procedure to enable automatic transfer at startup.
1,2,3...
1.
Prepare a Memory Cassette containing the required data.
When transferring the data to the Memory Cassette, set the operating
mode after automatic transfer at startup to PROGRAM mode (default).
2.
With the power supply turned OFF to the CPU Unit, remove the cover from
the Memory Cassette slot and insert the Memory Cassette.
3.
Open the cover for the CPU Unit's PERIPHERAL section and set DIP
switch pin SW2 to ON.
4.
Turn ON the power supply to the CPU Unit.
5.
The automatic transfer from the Memory Cassette will begin. The rest of
the procedure assumes that the operating mode after automatic transfer at
startup to PROGRAM mode (default).
6.
After the automatic transfer has been completed, turn OFF the power sup-
ply to the CPU Unit.
7.
Remove the Memory Cassette, and replace the Memory Cassette slot cov-
er.
8.
Return the setting of DIP switch pin SW2 to OFF, and close the cover.
Protected by password. Over-
writing permitted and duplica-
tion prohibited.
No
Yes
Protected by password. Over-
writing and duplication both pro-
hibited.
No
Transfer enabled only at
startup.
Transferring data from a CPU Unit with
14 or 20 I/O points to one with 30 or 40
I/O points
“0000” will be written to D10000 to D31999
in the CPU Unit with 30 or 40 I/O points.
Transferring data from a CPU Unit with
30 or 40 I/O points to one with 14 or 20
I/O points
D10000 to D31999 in the CPU Unit with 30
or 40 I/O points will be ignored.
Type of protection
Transfer from CPU Unit
to Memory Cassette
Transfer from Memory
Cassette to CPU Unit
MEMORY
DIP switch pin
SW2 set to ON.
Summary of Contents for CP1L - 12-2007
Page 3: ...iv...
Page 9: ...x...
Page 13: ...xiv TABLE OF CONTENTS...
Page 21: ...xxii...
Page 33: ...xxxiv Conformance to EC Directives 6...
Page 65: ...32 Function Blocks Section 1 5...
Page 428: ...395 Clock Section 6 9...
Page 429: ...396 Clock Section 6 9...
Page 523: ...488 Troubleshooting Unit Errors Section 9 4...
Page 531: ...496 Replacing User serviceable Parts Section 10 2...
Page 563: ...528 Auxiliary Area Allocations by Function Appendix C...
Page 611: ...576 Auxiliary Area Allocations by Address Appendix D...
Page 638: ...603 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 639: ...604 Connections to Serial Communications Option Boards Appendix F...
Page 669: ...634 Index...
Page 671: ...636 Revision History...