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106
Wiring CPU Unit I/O
Section 3-5
Sinking Transistor
Outputs (CP1L-M40DT-D)
Sourcing Transistor
Outputs (CP1L-M40DT1-D)
3-5-2
I/O Wiring for CPU Units with 30 I/O Points
Input Wiring (Upper Terminal Block)
The input circuits have 18 points/common. Use power lines with sufficient cur-
rent capacity for the COM terminals.
NC 00 01 02
03
04
06
00
01
03
04
06
NC COM COM COM COM
05
07
COM
02
COM
05
07
CIO 100
CIO 101
CIO 100
CIO 101
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
NC 00 01 02
03
04
06
00
01
03
04
06
NC COM COM COM COM
05
07
COM
02
COM
05
07
CIO 100
CIO 101
CIO 100
CIO 101
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
24 VDC
CIO 0
CIO 1
CIO 0
CIO 1
L1
L2/N COM
01
00
03
02
05
04
07
06
09
08
11
10
01
00
03
02
05
04
Summary of Contents for CP1L - 12-2007
Page 3: ...iv...
Page 9: ...x...
Page 13: ...xiv TABLE OF CONTENTS...
Page 21: ...xxii...
Page 33: ...xxxiv Conformance to EC Directives 6...
Page 65: ...32 Function Blocks Section 1 5...
Page 428: ...395 Clock Section 6 9...
Page 429: ...396 Clock Section 6 9...
Page 523: ...488 Troubleshooting Unit Errors Section 9 4...
Page 531: ...496 Replacing User serviceable Parts Section 10 2...
Page 563: ...528 Auxiliary Area Allocations by Function Appendix C...
Page 611: ...576 Auxiliary Area Allocations by Address Appendix D...
Page 638: ...603 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 639: ...604 Connections to Serial Communications Option Boards Appendix F...
Page 669: ...634 Index...
Page 671: ...636 Revision History...