492
32072H–AVR32–10/2012
AT32UC3A3
23.9.2
Clock Waveform Generator Register
Name:
CWGR
Access Type:
Read/Write
Offset:
0x04
Reset Value:
0x00000000
• EXP: Clock Prescaler
Used to specify how to prescale the TWCK clock. Counters are prescaled according to the following formula
• DATA: Data Setup and Hold Cycles
Clock cycles for data setup and hold count. Prescaled by CWGR.EXP. Used to time T
HD_DAT
, T
SU_DAT
.
• STASTO: START and STOP Cycles
Clock cycles in clock high count. Prescaled by CWGR.EXP. Used to time T
HD_STA
, T
SU_STA
, T
SU_STO
• HIGH: Clock High Cycles
Clock cycles in clock high count. Prescaled by CWGR.EXP. Used to time T
HIGH
.
• LOW: Clock Low Cycles
Clock cycles in clock low count. Prescaled by CWGR.EXP. Used to time T
LOW
, T
BUF
.
31
30
29
28
27
26
25
24
-
EXP
DATA
23
22
21
20
19
18
17
16
STASTO
15
14
13
12
11
10
9
8
HIGH
7
6
5
4
3
2
1
0
LOW
f
PRESCALER
f
CLK_TWIM
2
EXP
1
+
(
)
--------------------------
=
Summary of Contents for AT32UC3A3128
Page 61: ...61 32072H AVR32 10 2012 AT32UC3A3 PLLEN PLL Enable 0 PLL is disabled 1 PLL is enabled...
Page 592: ...592 32072H AVR32 10 2012 AT32UC3A3 Manchester Configuration Register on page 614...
Page 989: ...989 32072H AVR32 10 2012 AT32UC3A3 37 2 Package Drawings Figure 37 1 TFBGA 144 package drawing...
Page 991: ...991 32072H AVR32 10 2012 AT32UC3A3 Figure 37 3 VFBGA 100 package drawing...
