166
32072H–AVR32–10/2012
AT32UC3A3
14.5
Product Dependencies
In order to use this module, other parts of the system must be configured correctly, as described
below.
14.5.1
I/O Lines
The pins used for interfacing the compliant external devices may be multiplexed with I/O Con-
troller lines. The user must first configure the I/O Controller to assign the EBI pins to their
peripheral functions.
14.5.2
Power Management
To prevent bus errors EBI operation must be terminated before entering sleep mode.
14.5.3
Clocks
A number of clocks can be selected as source for the EBI. The selected clock must be enabled
by the Power Manager.
The following clock sources are available:
• CLK_EBI
• CLK_SDRAMC
• CLK_SMC
ADDR[17]
BA1
ADDR[17]
SDRAMC Bank 1
SMCAddress Bus Line 17
Output
SMC/CompactFlash shared lines
NRD
NRD
CFNOE
SMC Read Signal
CompactFlash CFNOE
Output
Low
NWE0
NWE0-NWE
CFNWE
SMC Write Enable10 or Write enable
CompactFlash CFNWE
Output
Low
NCS[4]
NCS[4]
CFCS[0]
SMC Chip Select Line 4
CompactFlash Chip Select Line 0
Output
Low
NCS[5]
NCS[5]
CFCS[1]
SMC Chip Select Line 5
CompactFlash Chip Select Line 1
Output
Low
SMC/NAND Flash/SmartMedia shared lines
NCS[2]
NCS[2]
NANDCS[0]
SMC Chip Select Line 2
NANDFlash/SmartMedia Chip Select Line
0
Output
Low
NCS[3]
NCS[3]
NANDCS[1]
SMC Chip Select Line 3
NANDFlash/SmartMedia Chip Select Line
1
Output
Low
SDRAMC/SMC/CompactFlash shared lines
NWE1
DQM1/
NWE1-NBS1/
CFNIORD
SDRAMC DQM1
SMC Write Enable1 or Byte Select 1
CompactFlash CFNIORD
Output
Pin Name
Alternate
Name
Pin Description
Type
Active
Level
Summary of Contents for AT32UC3A3128
Page 61: ...61 32072H AVR32 10 2012 AT32UC3A3 PLLEN PLL Enable 0 PLL is disabled 1 PLL is enabled...
Page 592: ...592 32072H AVR32 10 2012 AT32UC3A3 Manchester Configuration Register on page 614...
Page 989: ...989 32072H AVR32 10 2012 AT32UC3A3 37 2 Package Drawings Figure 37 1 TFBGA 144 package drawing...
Page 991: ...991 32072H AVR32 10 2012 AT32UC3A3 Figure 37 3 VFBGA 100 package drawing...