828
32072H–AVR32–10/2012
AT32UC3A3
The command ALL_SEND_CID and the fields and values for CMDR register are described in
and
.
Note:
bcr means broadcast command with response.
The Argument Register (ARGR) contains the argument field of the command.
To send a command, the user must perform the following steps:
• Set the ARGR register with the command argument.
The command is sent immediately after writing the command register.
As soon as the command register is written, then the Command Ready bit in the Status Register
(SR.CMDRDY) is cleared.
It is released and the end of the card response.
If the command requires a response, it can be read in the Response Registers (RSPRn). The
response size can be from 48 bits up to 136 bits depending on the command. The MCI embeds
an error detection to prevent any corrupted data during the transfer.
The following flowchart shows how to send a command to the card and read the response if
needed. In this example, the status register bits are polled but setting the appropriate bits in the
Interrupt Enable Register (IER) allows using an interrupt method.
Table 31-5.
ALL_SEND_CID Command Description
CMD Index
Type
Argument
Resp
Abbreviation
Command
Description
CMD2
bcr
[31:0] stuff bits
R2
ALL_SEND_CID
Asks all cards to
send their CID
numbers on the
CMD line
Table 31-6.
Fields and Values for the CMDR register
Field
Value
CMDNB (command number)
2 (CMD2)
RSPTYP (response type)
2 (R2: 136 bits response)
SPCMD (special command)
0 (not a special command)
OPCMD (open drain command)
1
MAXLAT (max latency for command to
response)
0 (NID cycles ==> 5 cycles)
TRCMD (transfer command)
0 (No transfer)
TRDIR (transfer direction)
X (available only in transfer command)
TRTYP (transfer type)
X (available only in transfer command)
IOSPCMD (SDIO special command)
0 (not a special command)
Summary of Contents for AT32UC3A3128
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Page 592: ...592 32072H AVR32 10 2012 AT32UC3A3 Manchester Configuration Register on page 614...
Page 989: ...989 32072H AVR32 10 2012 AT32UC3A3 37 2 Package Drawings Figure 37 1 TFBGA 144 package drawing...
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