823
32072H–AVR32–10/2012
AT32UC3A3
31.4
I/O Lines Description
31.5
Product Dependencies
In order to use this module, other parts of the system must be configured correctly, as described
below.
31.5.1
Power Management
If the CPU enters a sleep mode that disables clocks used by the MCI, the MCI will stop function-
ing and resume operation after the system wakes up from sleep mode.
31.5.2
I/O Lines
The pins used for interfacing the MultiMedia Cards or SD Cards may be multiplexed with GPIO
lines. User must first program the I/O controller to assign the peripheral functions to MCI pins.
31.5.3
Clocks
The clock for the MCI bus interface (CLK_MCI) is generated by the Power Manager. This clock
is enabled at reset, and can be disabled in the Power Manager. It is recommended to disable the
MCI before disabling the clock, to avoid freezing the MCI in an undefined state.
31.5.4
Interrupt
The MCI interrupt request line is connected to the interrupt controller. Using the MCI interrupt
requires the interrupt controller to be programmed first.
31.6
Functional Description
31.6.1
Bus Topology
Figure 31-3. Multimedia Memory Card Bus Topology
Table 31-1.
I/O Lines Description
Pin Name
Pin Description
Type
(1)
1.
PP: Push/Pull, OD: Open Drain
Comments
CMD[1:0]
Command/Response
Input/Output/
PP/OD
CMD of a MMC or SDCard/SDIO
CLK
Clock
Input/Output
CLK of a MMC or SD Card/SDIO
DATA[7:0]
Data 0..7 of Slot A
Input/Output/PP
DAT[0..7] of a MMC
DAT[0..3] of a SD Card
/
SDIO
DATA[15:8]
Data 0..7 of Slot B
Input/Output/PP
DAT[0..7] of a MMC
DAT[0..3] of a SD Card
/
SDIO
1 2 3 4 5 6
MMC
7
910
1213 8
Summary of Contents for AT32UC3A3128
Page 61: ...61 32072H AVR32 10 2012 AT32UC3A3 PLLEN PLL Enable 0 PLL is disabled 1 PLL is enabled...
Page 592: ...592 32072H AVR32 10 2012 AT32UC3A3 Manchester Configuration Register on page 614...
Page 989: ...989 32072H AVR32 10 2012 AT32UC3A3 37 2 Package Drawings Figure 37 1 TFBGA 144 package drawing...
Page 991: ...991 32072H AVR32 10 2012 AT32UC3A3 Figure 37 3 VFBGA 100 package drawing...