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32072H–AVR32–10/2012
AT32UC3A3
27.6
Product Dependencies
In order to use this module, other parts of the system must be configured correctly, as described
below.
27.6.1
I/O Lines
The USB_VBOF and USB_ID pins are multiplexed with I/O Controller lines and may also be
multiplexed with lines of other peripherals. In order to use them with the USB, the user must first
configure the I/O Controller to assign them to their USB peripheral functions.
If USB_ID is used, the I/O Controller must be configured to enable the internal pull-up resistor of
its pin.
If USB_VBOF or USB_ID is not used by the application, the corresponding pin can be used for
other purposes by the I/O Controller or by other peripherals.
27.6.2
Clocks
The clock for the USBB bus interface (CLK_USBB) is generated by the Power Manager. This
clock is enabled at reset, and can be disabled in the Power Manager. It is recommended to dis-
able the USBB before disabling the clock, to avoid freezing the USBB in an undefined state.
The UTMI transceiver needs a 12 MHz clock as a clock reference for its internal 480 MHz PLL.
Before using the USB, the user must ensure that this 12 MHz clock is available. The 12 MHz
input is connected to a Generic Clock (GCLK_USBB) provided by the Power Manager.
27.6.3
Interrupts
The USBB interrupt request line is connected to the interrupt controller. Using the USBB inter-
rupt requires the interrupt controller to be programmed first.
Summary of Contents for AT32UC3A3128
Page 61: ...61 32072H AVR32 10 2012 AT32UC3A3 PLLEN PLL Enable 0 PLL is disabled 1 PLL is enabled...
Page 592: ...592 32072H AVR32 10 2012 AT32UC3A3 Manchester Configuration Register on page 614...
Page 989: ...989 32072H AVR32 10 2012 AT32UC3A3 37 2 Package Drawings Figure 37 1 TFBGA 144 package drawing...
Page 991: ...991 32072H AVR32 10 2012 AT32UC3A3 Figure 37 3 VFBGA 100 package drawing...
