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6 Memory
6.8
NandFlash2 Retention(ErasedCell): NAND flash memory cell Data
retention test after Erase (A.01.20)
[Supported Analyzer]
B1500A
[Description]
Performs the data retention test for the NAND type flash memory cell after the erase operation, and plots the
accumulated time vs threshold voltage characteristics. The test is performed as follows.
1. Applies the erase pulse.
2. Measures the Id-Vg characteristics, and extracts the threshold voltage (Vth).
3. If the accumulated time is 100 seconds or less:
Performs the drain current sampling measurement, 10 seconds in 1 second step.
After the sampling measurement, measures the Id-Vg characteristics and extracts Vth.
4. If the accumulated time is more than 100 seconds:
Performs the drain current sampling measurement, 100 seconds in 10 seconds step.
After the sampling measurement, measures the Id-Vg characteristics and extracts Vth.
5. Repeats 3 or 4 until that the accumulated time overs the specified TotalRetentionTime.
The available TotalRetentionTime value is 10 to 10000 seconds.
[Device Under Test]
NAND-type flash memory cell
Connect the Source and Substrate to the ASU1 Output, and the Drain to the ASU2 Output.
Open the Floating Gate, and connect the other terminals to the PGU2 output terminal.
[Required Modules and Accessories]
Agilent 81110A pulse generator (2-output, PGU1 and PGU2) 1 unit
HRSMU/ASU 2 sets (ASU1 and ASU2)
ASU1 connections: Output: Source and Substrate, SMU: HRSMU, AUX: PGU1
ASU2 connections: Output: Drain, SMU: HRSMU, AUX: PGU1
Setting of ASU I/O Path, ASU tab, Configuration window: AUX
PGU1 is connected to keep the setup for the data write operation.
[Device Parameters]
Lg: Gate length
Wg: Gate width
Temp: Temperature
IdMax: Drain current compliance
[Test Parameters]
Gate: SMU connected to Gate terminal, primary sweep voltage output
Drain: SMU connected to Drain terminal, constant voltage output
Source: SMU connected to Source and Substrate terminals, constant voltage output
VgStart: Sweep start voltage for Gate terminal
VgStop: Sweep stop voltage for Gate terminal
VgStep: Sweep step voltage for Gate terminal
Vd: Drain voltage
Id@Vth: Drain current to decide the Vth
IntegTime: Integration time
PulsePeriod: Erase pulse period
PulseDelay: Erase pulse delay
Agilent EasyEXPERT Application Library Reference, Edition 8
6-19
Содержание EasyEXPERT
Страница 1: ...Agilent Technologies Agilent EasyEXPERT Application Library Reference ...
Страница 17: ...1 BJT ...
Страница 63: ...2 CMOS ...
Страница 119: ...3 Discrete ...
Страница 127: ...4 GenericTest ...
Страница 133: ...5 MCSMU_IV ...
Страница 141: ...6 Memory ...
Страница 211: ...7 MixedSignal ...
Страница 249: ...8 NanoTech ...
Страница 265: ...9 Organic ...
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Страница 285: ...11 Reliability ...
Страница 377: ...12 Sample ...
Страница 381: ...13 Solar Cell ...
Страница 401: ...14 SPGU_PLSDIV ...
Страница 409: ...15 Structure ...
Страница 459: ...16 TFT ...
Страница 463: ...17 Utility ...
Страница 478: ...17 Utility Agilent EasyEXPERT Application Library Reference Edition 8 17 16 ...
Страница 479: ...18 WGFMU ...
Страница 493: ...19 WGFMU_IV ...
Страница 497: ...19 WGFMU_IV Id Drain current Vg gate voltage Agilent EasyEXPERT Application Library Reference Edition 8 19 5 ...
Страница 501: ...19 WGFMU_IV Id Drain current Vd Drain voltage Agilent EasyEXPERT Application Library Reference Edition 8 19 9 ...
Страница 505: ...20 GaN Diode ...
Страница 511: ...21 GaN FET ...
Страница 523: ...22 IGBT ...
Страница 549: ...23 Interconnection ...
Страница 553: ...24 MISCAP ...
Страница 561: ...25 PowerBJT ...
Страница 576: ...25 PowerBJT Agilent EasyEXPERT Application Library Reference Edition 8 25 16 ...
Страница 577: ...26 PowerDiode ...
Страница 585: ...27 PowerMOSFET PMIC SiC ...