Intel 80C186XL, User Manual

Page: 366 / 405

C-43
INSTRUCTION SET DESCRIPTIONS
SHR Shift Logical Right:
SHR dest, src
Shifts the bits in the destination
operand (byte or word) to the right by
the number of bits specified in the
count operand. Zeros are shifted in on
the left. If the sign bit retains its original
value, then OF is cleared.
Instruction Operands:
SHR reg, n
SHR mem, n
SHR reg, CL
SHR mem, CL
(temp)
←
count
do while (temp)
≠
0
(CF)
←
low-order bit of (dest)
(dest)
←
(dest) / 2
(temp)
←
(temp) – 1
if
count = 1
then
if
high-order bit of (dest)
≠
next-to-high-order bit of (dest)
then
(OF)
←
1
else
(OF)
←
0
else
(OF) undefined
AF ?
CF
ü
DF –
IF –
OF
ü
PF
ü
SF
ü
TF –
ZF
ü
STC Set Carry Flag:
STC
Sets CF to 1.
Instruction Operands:
none
(CF)
←
1 AF –
CF
ü
DF –
IF –
OF –
PF –
SF –
TF –
ZF –
STD Set Direction Flag:
STD
Sets DF to 1 causing the string instruc-
tions to auto-decrement the SI and/or
DI index registers.
Instruction Operands:
none
(DF)
←
1 AF –
CF –
DF
ü
IF –
OF –
PF –
SF –
TF –
ZF –
Table C-4. Instruction Set (Continued)
Name Description Operation
Flags
Affected
NOTE: The three symbols used in the Flags Affected column are defined as follows:
– the contents of the flag remain unchanged after the instruction is executed
? the contents of the flag is undefined after the instruction is executed
ü
the flag is updated after the instruction is executed