Intel 80C186XL, User Manual

Page: 329 / 405

INSTRUCTION SET DESCRIPTIONS
C-6
ADD Addition:
ADD dest, src
Sums two operands, which may be
bytes or words, replaces the
destination operand. Both operands
may be signed or unsigned binary
numbers (see AAA and DAA).
Instruction Operands:
ADD reg, reg
ADD reg, mem
ADD mem, reg
ADD reg, immed
ADD mem, immed
ADD accum, immed
(dest)
←
(dest) + (src) AF
ü
CF
ü
DF –
IF –
OF
ü
PF
ü
SF
ü
TF –
ZF
ü
AND And Logical:
AND dest, src
Performs the logical "and" of the two
operands (byte or word) and returns
the result to the destination operand. A
bit in the result is set if both corre-
sponding bits of the original operands
are set; otherwise the bit is cleared.
Instruction Operands:
AND reg, reg
AND reg, mem
AND mem, reg
AND reg, immed
AND mem, immed
AND accum, immed
(dest)
←
(dest) and (src)
(CF)
←
0
(OF)
←
0
AF ?
CF
ü
DF –
IF –
OF
ü
PF
ü
SF
ü
TF –
ZF
ü
Table C-4. Instruction Set (Continued)
Name Description Operation
Flags
Affected
NOTE: The three symbols used in the Flags Affected column are defined as follows:
– the contents of the flag remain unchanged after the instruction is executed
? the contents of the flag is undefined after the instruction is executed
ü
the flag is updated after the instruction is executed