10-15
DIRECT MEMORY ACCESS UNIT
Figure 10-11. DMA Control Register
Register Name:
DMA Control Register
Register Mnemonic:
DxCON
Register Function:
Controls DMA channel parameters.
Bit
Mnemonic
Bit Name
Reset
State
Function
DMEM
Destination
Address
Space
Select
X
Selects memory or I/O space for the destination
pointer. Set DMEM to select memory space; clear
DMEM to select I/O space.
DDEC
Destination
Decrement
X
Set DDEC to automatically decrement the destination
pointer after each transfer. (See Note.)
DINC
Destination
Increment
X
Set DINC to automatically increment the destination
pointer after each transfer. (See Note.)
SMEM
Source
Address
Space
Select
X
Selects memory or I/O space for the source pointer.
Set SMEM to select memory space; clear SMEM to
select I/O space.
SDEC
Source
Decrement
X
Set SDEC to automatically decrement the source
pointer after each transfer. (See Note.)
SINC
Source
Increment
X
Set SINC to automatically increment the source
pointer after each transfer. (See Note.)
NOTE:
Reserved register bits are shown with gray shading. Reserved bits must be written to a
logic zero to ensure compatibility with future Intel products. A pointer remains constant if
its increment and decrement bits are equal.
15
0
S
T
R
T
C
H
G
W
O
R
D
P
S
Y
N
0
S
Y
N
1
I
D
R
Q
T
C
S
I
N
C
S
D
E
C
I
N
T
D
I
N
C
D
D
E
C
D
M
E
M
S
M
E
M
A1180-0A
Summary of Contents for 80C186XL
Page 1: ...80C186XL 80C188XL Microprocessor User s Manual...
Page 2: ...80C186XL 80C188XL Microprocessor User s Manual 1995...
Page 18: ...1 Introduction...
Page 19: ......
Page 27: ......
Page 28: ...2 Overview of the 80C186 Family Architecture...
Page 29: ......
Page 79: ......
Page 80: ...3 Bus Interface Unit...
Page 81: ......
Page 127: ......
Page 128: ...4 Peripheral Control Block...
Page 129: ......
Page 137: ......
Page 138: ...5 ClockGenerationand Power Management...
Page 139: ......
Page 154: ...6 Chip Select Unit...
Page 155: ......
Page 178: ...7 Refresh Control Unit...
Page 179: ......
Page 193: ......
Page 194: ...8 Interrupt Control Unit...
Page 195: ......
Page 227: ......
Page 228: ...9 Timer Counter Unit...
Page 229: ......
Page 253: ......
Page 254: ...10 Direct Memory Access Unit...
Page 255: ......
Page 283: ......
Page 284: ...11 Math Coprocessing...
Page 285: ......
Page 302: ...12 ONCE Mode...
Page 303: ......
Page 306: ...A 80C186 Instruction Set Additions and Extensions...
Page 307: ......
Page 318: ...B Input Synchronization...
Page 319: ......
Page 322: ...C Instruction Set Descriptions...
Page 323: ......
Page 371: ......
Page 372: ...D Instruction Set Opcodes and Clock Cycles...
Page 373: ......
Page 396: ...Index...
Page 397: ......