2-11
OVERVIEW OF THE 80C186 FAMILY ARCHITECTURE
Figure 2-7. Currently Addressable Segments
The segment register is automatically selected according to the rules in Table 2-2. All information
in one segment type generally shares the same logical attributes (e.g., code or data). This leads to
programs that are shorter, faster and better structured.
The Bus Interface Unit must obtain the logical address before generating the physical address.
The logical address of a memory location can come from different sources, depending on the type
of reference that is being made (see Table 2-2).
Segment registers always hold the segment base addresses. The Bus Interface Unit determines
which segment register contains the base address according to the type of memory reference
made. However, the programmer can explicitly direct the Bus Interface Unit to use any currently
addressable segment (except for the destination operand of a string instruction). In assembly lan-
guage, this is done by preceding an instruction with a segment override prefix.
B
E
J
B
A
F
D
E
G
H
J
K
CS:
SS:
ES:
FFFFFH
Code:
Stack:
Extra:
DS:
Data:
0H
C
I
H
A1037-0A
Summary of Contents for 80C186XL
Page 1: ...80C186XL 80C188XL Microprocessor User s Manual...
Page 2: ...80C186XL 80C188XL Microprocessor User s Manual 1995...
Page 18: ...1 Introduction...
Page 19: ......
Page 27: ......
Page 28: ...2 Overview of the 80C186 Family Architecture...
Page 29: ......
Page 79: ......
Page 80: ...3 Bus Interface Unit...
Page 81: ......
Page 127: ......
Page 128: ...4 Peripheral Control Block...
Page 129: ......
Page 137: ......
Page 138: ...5 ClockGenerationand Power Management...
Page 139: ......
Page 154: ...6 Chip Select Unit...
Page 155: ......
Page 178: ...7 Refresh Control Unit...
Page 179: ......
Page 193: ......
Page 194: ...8 Interrupt Control Unit...
Page 195: ......
Page 227: ......
Page 228: ...9 Timer Counter Unit...
Page 229: ......
Page 253: ......
Page 254: ...10 Direct Memory Access Unit...
Page 255: ......
Page 283: ......
Page 284: ...11 Math Coprocessing...
Page 285: ......
Page 302: ...12 ONCE Mode...
Page 303: ......
Page 306: ...A 80C186 Instruction Set Additions and Extensions...
Page 307: ......
Page 318: ...B Input Synchronization...
Page 319: ......
Page 322: ...C Instruction Set Descriptions...
Page 323: ......
Page 371: ......
Page 372: ...D Instruction Set Opcodes and Clock Cycles...
Page 373: ......
Page 396: ...Index...
Page 397: ......