OVERVIEW OF THE 80C186 FAMILY ARCHITECTURE
2-20
Table 2-5 shows the interpretations of various bit patterns according to number type. Binary num-
bers can be 8 or 16 bits long. Decimal numbers are stored in bytes, two digits per byte for packed
decimal and one digit per byte for unpacked decimal. The processor assumes that the operands in
arithmetic instructions contain data that represents valid numbers for that instruction. Invalid data
may produce unpredictable results. The Execution Unit analyzes the results of arithmetic instruc-
tions and adjusts status flags accordingly.
Table 2-4. Arithmetic Instructions
Addition
ADD
Add byte or word
ADC
Add byte or word with carry
INC
Increment byte or word by 1
AAA
ASCII adjust for addition
DAA
Decimal adjust for addition
Subtraction
SUB
Subtract byte or word
SBB
Subtract byte or word with borrow
DEC
Decrement byte or word by 1
NEG
Negate byte or word
CMP
Compare byte or word
AAS
ASCII adjust for subtraction
DAS
Decimal adjust for subtraction
Multiplication
MUL
Multiply byte or word unsigned
IMUL
Integer multiply byte or word
AAM
ASCII adjust for multiplication
Division
DIV
Divide byte or word unsigned
IDIV
Integer divide byte or word
AAD
ASCII adjust for division
CBW
Convert byte to word
CWD
Convert word to double-word
Summary of Contents for 80C186XL
Page 1: ...80C186XL 80C188XL Microprocessor User s Manual...
Page 2: ...80C186XL 80C188XL Microprocessor User s Manual 1995...
Page 18: ...1 Introduction...
Page 19: ......
Page 27: ......
Page 28: ...2 Overview of the 80C186 Family Architecture...
Page 29: ......
Page 79: ......
Page 80: ...3 Bus Interface Unit...
Page 81: ......
Page 127: ......
Page 128: ...4 Peripheral Control Block...
Page 129: ......
Page 137: ......
Page 138: ...5 ClockGenerationand Power Management...
Page 139: ......
Page 154: ...6 Chip Select Unit...
Page 155: ......
Page 178: ...7 Refresh Control Unit...
Page 179: ......
Page 193: ......
Page 194: ...8 Interrupt Control Unit...
Page 195: ......
Page 227: ......
Page 228: ...9 Timer Counter Unit...
Page 229: ......
Page 253: ......
Page 254: ...10 Direct Memory Access Unit...
Page 255: ......
Page 283: ......
Page 284: ...11 Math Coprocessing...
Page 285: ......
Page 302: ...12 ONCE Mode...
Page 303: ......
Page 306: ...A 80C186 Instruction Set Additions and Extensions...
Page 307: ......
Page 318: ...B Input Synchronization...
Page 319: ......
Page 322: ...C Instruction Set Descriptions...
Page 323: ......
Page 371: ......
Page 372: ...D Instruction Set Opcodes and Clock Cycles...
Page 373: ......
Page 396: ...Index...
Page 397: ......