OVERVIEW OF THE 80C186 FAMILY ARCHITECTURE
2-8
2.1.7
Memory Segmentation
Programs for the 80C186 Modular Core family view the 1 Mbyte memory space as a group of
user-defined segments. A segment is a logical unit of memory that can be up to 64 Kbytes long.
Each segment is composed of contiguous memory locations. Segments are independent and sep-
arately addressable. Software assigns every segment a base address (starting location) in memory
space. All segments begin on 16-byte memory boundaries. There are no other restrictions on seg-
ment locations. Segments can be adjacent, disjoint, partially overlapped or fully overlapped (see
Figure 2-6). A physical memory location can be mapped into (covered by) one or more logical
segments.
Summary of Contents for 80C186XL
Page 1: ...80C186XL 80C188XL Microprocessor User s Manual...
Page 2: ...80C186XL 80C188XL Microprocessor User s Manual 1995...
Page 18: ...1 Introduction...
Page 19: ......
Page 27: ......
Page 28: ...2 Overview of the 80C186 Family Architecture...
Page 29: ......
Page 79: ......
Page 80: ...3 Bus Interface Unit...
Page 81: ......
Page 127: ......
Page 128: ...4 Peripheral Control Block...
Page 129: ......
Page 137: ......
Page 138: ...5 ClockGenerationand Power Management...
Page 139: ......
Page 154: ...6 Chip Select Unit...
Page 155: ......
Page 178: ...7 Refresh Control Unit...
Page 179: ......
Page 193: ......
Page 194: ...8 Interrupt Control Unit...
Page 195: ......
Page 227: ......
Page 228: ...9 Timer Counter Unit...
Page 229: ......
Page 253: ......
Page 254: ...10 Direct Memory Access Unit...
Page 255: ......
Page 283: ......
Page 284: ...11 Math Coprocessing...
Page 285: ......
Page 302: ...12 ONCE Mode...
Page 303: ......
Page 306: ...A 80C186 Instruction Set Additions and Extensions...
Page 307: ......
Page 318: ...B Input Synchronization...
Page 319: ......
Page 322: ...C Instruction Set Descriptions...
Page 323: ......
Page 371: ......
Page 372: ...D Instruction Set Opcodes and Clock Cycles...
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Page 396: ...Index...
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