2-17
OVERVIEW OF THE 80C186 FAMILY ARCHITECTURE
2.2
SOFTWARE OVERVIEW
All 80C186 Modular Core family members execute the same instructions. This includes all the
8086/8088 instructions plus several additions and enhancements (see Appendix A, “80C186 In-
struction Set Additions and Extensions”). The following sections describe the instructions by cat-
egory and provide a detailed discussion of the operand addressing modes.
Software for 80C186 core family systems need not be written in assembly language. The proces-
sor provides direct hardware support for programs written in the many high-level languages
available. The hardware addressing modes provide straightforward implementations of based
variables, arrays, arrays of structures and other high-level language data constructs. A powerful
set of memory-to-memory string operations allow efficient character data manipulation. Finally,
routines with critical performance requirements can be written in assembly language and linked
with high-level code.
2.2.1
Instruction Set
The 80C186 Modular Core family instructions treat different types of operands uniformly. Nearly
every instruction can operate on either byte or word data. Register, memory and immediate op-
erands can be specified interchangeably in most instructions. Immediate values are exceptions:
they must serve as source operands and not destination operands. Memory variables can be ma-
nipulated (added to, subtracted from, shifted, compared) without being moved into and out of reg-
isters. This saves instructions, registers and execution time in assembly language programs. In
high-level languages, where most variables are memory-based, compilers can produce faster and
shorter object programs.
The 80C186 Modular Core family instruction set can be viewed as existing on two levels. One is
the assembly level and the other is the machine level. To the assembly language programmer, the
80C186 Modular Core family appears to have about 100 instructions. One MOV (data move) in-
struction, for example, transfers a byte or a word from a register, a memory location or an imme-
diate value to either a register or a memory location. The 80C186 Modular Core family CPUs,
however, recognize 28 different machine versions of the MOV instruction.
The two levels of instruction sets address two requirements: efficiency and simplicity. Approxi-
mately 300 forms of machine-level instructions make very efficient use of storage. For example,
the machine instruction that increments a memory operand is three or four bytes long because the
address of the operand must be encoded in the instruction. Incrementing a register, however, re-
quires less information, so the instruction can be shorter. The 80C186 Core family has eight sin-
gle-byte machine-level instructions that increment different 16-bit registers.
The assembly level instructions simplify the programmer’s view of the instruction set. The pro-
grammer writes one form of an INC (increment) instruction and the assembler examines the op-
erand to determine which machine level instruction to generate. The following paragraphs
provide a functional description of the assembly-level instructions.
Summary of Contents for 80C186XL
Page 1: ...80C186XL 80C188XL Microprocessor User s Manual...
Page 2: ...80C186XL 80C188XL Microprocessor User s Manual 1995...
Page 18: ...1 Introduction...
Page 19: ......
Page 27: ......
Page 28: ...2 Overview of the 80C186 Family Architecture...
Page 29: ......
Page 79: ......
Page 80: ...3 Bus Interface Unit...
Page 81: ......
Page 127: ......
Page 128: ...4 Peripheral Control Block...
Page 129: ......
Page 137: ......
Page 138: ...5 ClockGenerationand Power Management...
Page 139: ......
Page 154: ...6 Chip Select Unit...
Page 155: ......
Page 178: ...7 Refresh Control Unit...
Page 179: ......
Page 193: ......
Page 194: ...8 Interrupt Control Unit...
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Page 227: ......
Page 228: ...9 Timer Counter Unit...
Page 229: ......
Page 253: ......
Page 254: ...10 Direct Memory Access Unit...
Page 255: ......
Page 283: ......
Page 284: ...11 Math Coprocessing...
Page 285: ......
Page 302: ...12 ONCE Mode...
Page 303: ......
Page 306: ...A 80C186 Instruction Set Additions and Extensions...
Page 307: ......
Page 318: ...B Input Synchronization...
Page 319: ......
Page 322: ...C Instruction Set Descriptions...
Page 323: ......
Page 371: ......
Page 372: ...D Instruction Set Opcodes and Clock Cycles...
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Page 396: ...Index...
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