INSTRUCTION SET DESCRIPTIONS
C-22
JCXZ
Jump if CX Zero:
JCXZ
disp8
Transfers control to the target location
if CX is 0. Useful at the beginning of a
loop to bypass the loop if CX has a
zero value, i.e., to execute the loop
zero times.
Instruction Operands:
JCXZ short-label
if
(CX) = 0
then
(IP)
←
(IP) + disp8 (sign-ext to 16 bits)
AF –
CF –
DF –
IF –
OF –
PF –
SF –
TF –
ZF –
JE
JZ
Jump on Equal:
Jump on Zero:
JE disp8
JZ
disp8
Transfers control to the target location
if the condition tested (ZF = 1) is true.
Instruction Operands:
JE short-label
JZ short-label
if
(ZF) = 1
then
(IP)
←
(IP) + disp8 (sign-ext to 16 bits)
AF –
CF –
DF –
IF –
OF –
PF –
SF –
TF –
ZF –
JG
JNLE
Jump on Greater Than:
Jump on Not Less Than or Equal:
JG disp8
JNLE
disp8
Transfers control to the target location
if the condition tested (SF = OF) and
(ZF=0) is true.
Instruction Operands:
JG short-label
JNLE short-label
if
((SF) = (OF)) and ((ZF) = 0)
then
(IP)
←
(IP) + disp8 (sign-ext to 16 bits)
AF –
CF –
DF –
IF –
OF –
PF –
SF –
TF –
ZF –
JGE
JNL
Jump on Greater Than or Equal:
Jump on Not Less Than:
JGE
disp8
JNL
disp8
Transfers control to the target location
if the condition tested (SF=OF) is true.
Instruction Operands:
JGE short-label
JNL short-label
if
(SF) = (OF)
then
(IP)
←
(IP) + disp8 (sign-ext to 16 bits)
AF –
CF –
DF –
IF –
OF –
PF –
SF –
TF –
ZF –
Table C-4. Instruction Set (Continued)
Name
Description
Operation
Flags
Affected
NOTE:
The three symbols used in the Flags Affected column are defined as follows:
– the contents of the flag remain unchanged after the instruction is executed
? the contents of the flag is undefined after the instruction is executed
ü
the flag is updated after the instruction is executed
Summary of Contents for 80C186XL
Page 1: ...80C186XL 80C188XL Microprocessor User s Manual...
Page 2: ...80C186XL 80C188XL Microprocessor User s Manual 1995...
Page 18: ...1 Introduction...
Page 19: ......
Page 27: ......
Page 28: ...2 Overview of the 80C186 Family Architecture...
Page 29: ......
Page 79: ......
Page 80: ...3 Bus Interface Unit...
Page 81: ......
Page 127: ......
Page 128: ...4 Peripheral Control Block...
Page 129: ......
Page 137: ......
Page 138: ...5 ClockGenerationand Power Management...
Page 139: ......
Page 154: ...6 Chip Select Unit...
Page 155: ......
Page 178: ...7 Refresh Control Unit...
Page 179: ......
Page 193: ......
Page 194: ...8 Interrupt Control Unit...
Page 195: ......
Page 227: ......
Page 228: ...9 Timer Counter Unit...
Page 229: ......
Page 253: ......
Page 254: ...10 Direct Memory Access Unit...
Page 255: ......
Page 283: ......
Page 284: ...11 Math Coprocessing...
Page 285: ......
Page 302: ...12 ONCE Mode...
Page 303: ......
Page 306: ...A 80C186 Instruction Set Additions and Extensions...
Page 307: ......
Page 318: ...B Input Synchronization...
Page 319: ......
Page 322: ...C Instruction Set Descriptions...
Page 323: ......
Page 371: ......
Page 372: ...D Instruction Set Opcodes and Clock Cycles...
Page 373: ......
Page 396: ...Index...
Page 397: ......