INSTRUCTION SET DESCRIPTIONS
C-38
RET
Return:
RET
optional-pop-value
Transfers control from a procedure
back to the instruction following the
CALL that activated the procedure.
The assembler generates an intra-
segment RET if the programmer has
defined the procedure near, or an
intersegment RET if the procedure has
been defined as far. RET pops the
word at the top of the stack (pointed to
by register SP) into the instruction
pointer and increments SP by two. If
RET is intersegment, the word at the
new top of stack is popped into the CS
register, and SP is again incremented
by two. If an optional pop value has
been specified, RET adds that value to
SP.
Instruction Operands:
RET immed8
(IP)
←
((SP) = 1:(SP))
(SP)
←
(SP) + 2
if
inter-segment
then
(CS)
←
((SP) + 1:(SP))
(SP)
←
(SP) + 2
if
add immed8 to SP
then
(SP)
←
(SP) + data
AF –
CF –
DF –
IF –
OF –
PF –
SF –
TF –
ZF –
ROL
Rotate Left:
ROL dest, count
Rotates the destination byte or word
left by the number of bits specified in
the count operand.
Instruction Operands:
ROL reg, n
ROL mem, n
ROL reg, CL
ROL mem CL
(temp)
←
count
do while (temp)
≠
0
(CF)
←
high-order bit of (dest)
(dest)
←
(dest) × 2 + (CF)
(temp)
←
(temp) – 1
if
count = 1
then
if
high-order bit of (dest)
≠
(CF)
then
(OF)
←
1
else
(OF)
←
0
else
(OF) undefined
AF –
CF
ü
DF –
IF –
OF
ü
PF –
SF –
TF –
ZF –
Table C-4. Instruction Set (Continued)
Name
Description
Operation
Flags
Affected
NOTE:
The three symbols used in the Flags Affected column are defined as follows:
– the contents of the flag remain unchanged after the instruction is executed
? the contents of the flag is undefined after the instruction is executed
ü
the flag is updated after the instruction is executed
Summary of Contents for 80C186XL
Page 1: ...80C186XL 80C188XL Microprocessor User s Manual...
Page 2: ...80C186XL 80C188XL Microprocessor User s Manual 1995...
Page 18: ...1 Introduction...
Page 19: ......
Page 27: ......
Page 28: ...2 Overview of the 80C186 Family Architecture...
Page 29: ......
Page 79: ......
Page 80: ...3 Bus Interface Unit...
Page 81: ......
Page 127: ......
Page 128: ...4 Peripheral Control Block...
Page 129: ......
Page 137: ......
Page 138: ...5 ClockGenerationand Power Management...
Page 139: ......
Page 154: ...6 Chip Select Unit...
Page 155: ......
Page 178: ...7 Refresh Control Unit...
Page 179: ......
Page 193: ......
Page 194: ...8 Interrupt Control Unit...
Page 195: ......
Page 227: ......
Page 228: ...9 Timer Counter Unit...
Page 229: ......
Page 253: ......
Page 254: ...10 Direct Memory Access Unit...
Page 255: ......
Page 283: ......
Page 284: ...11 Math Coprocessing...
Page 285: ......
Page 302: ...12 ONCE Mode...
Page 303: ......
Page 306: ...A 80C186 Instruction Set Additions and Extensions...
Page 307: ......
Page 318: ...B Input Synchronization...
Page 319: ......
Page 322: ...C Instruction Set Descriptions...
Page 323: ......
Page 371: ......
Page 372: ...D Instruction Set Opcodes and Clock Cycles...
Page 373: ......
Page 396: ...Index...
Page 397: ......