Eaton ELC-PB, Programming Manual

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E L C P r o g r a m m i n g M a n u a l
F o r m o r e i nf o r m a t i o n v i sit :
w w w. e a t o n . c o m
MN05003003E
3-132
Flag Function
M1323 C238 Reset input point control
M1324 C239 Reset input point control
M1325 C240 Reset input point control
M1328 Enable Start/Reset of C235
M1329 Enable Start/Reset of C236
M1330 Enable Start/Reset of C237
M1331 Enable Start/Reset of C238
M1332 Enable Start/Reset of C239
M1333 Enable Start/Reset of C240
Special D Function
D1022
Multiplied frequency of A-B phase counters for ELC-PB/PC/PA/PH,
ELCB-PB, ELCM-PH/PA series
D1150 Table counting register for DHSZ multiple set values comparison mode
D1151 Register for DHSZ instruction frequency control mode (counting by table)
D1152 (LW)
D1153 (HW)
In frequency control mode, DHSZ reads the upper and lower limits in the
table counting register D1153 and D1152.
D1166 ELC-PH: Switching between rising/falling edge counting modes of X10.
D1167 ELC-PH: Switching between rising/falling edge counting modes of X11.
D1180 (LW)
D1181 (HW)
ELC-PH: When Interrupt X4 I401 occurs, D1180 will read the low 16-bit of
high-speed counter, D1181 will read the high 16-bit of high-speed counter.
ELC-PC/PA
：
When interrupt X2 / I201 occurs, D1180 will store the low word
of high speed counting value at X0, D1181 will store the high word of high
speed counting value at X0.
D1198 (LW)
D1199 (HW)
ELC-PH: When Interrupt X5 I501 occurs, D1198 will read the low 16-bit of
high-speed counter, D1199 will read the high 16-bit of high-speed counter.
ELC-PC/PA
：
When interrupt X3 / I301 occurs, D1198 will store the low word
of high speed counting value at X0, D1199 will store the high word of high
speed counting value at X0.
D1225 The counting mode of the 1
st
group counters (C241, C246, C251)
D1226 The counting mode of the 2
nd
group counters (C242, C247, C252)
D1227 The counting mode of the 3
rd
group counters (C243, C248, C253)
D1228 The counting mode of the 4
th
group counters (C244, C249, C254)