Eaton ELC-PB, Programming Manual

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E L C P r o g r a m m i n g M a n u a l
F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m M N 0 5 0 0 3 0 0 3 E
3 - 2 9 2
Register Data Descriptions
D111 low byte ‘0’ 30 H
D112 low byte ‘6’ 36 H
D113 low byte ‘E’ 45 H LRC CHK 0
D114 low byte ‘7’ 37 H LRC CHK 1
LRC CHK (0,1) error check code
D115 low byte CR D H
D116 low byte LF A H
END
The LRC CHK (0,1) above is error check code and it can be calculated with the LRC instruction
(8-bit Mode, M1161= ON).
M1000
LRC D101 K12 D113
LRC check: 01 H + 03 H + 07 H + 08 H + 00 H + 06 H = 19 H, then take the 2’s complement, E7 H.
At that time, ‘E’(45 H) is stored in the lower 8-bits of D113 and ‘7’ (37 H) is stored in the lower 8-bits
of D114.