Eaton ELC-PB, Programming Manual

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E L C P r o g r a m m i n g M a n u a l
F o r m o r e i nf o r m a t i o n v i sit :
w w w. e a t o n . c o m
MN05003003E
3-134
API Mnemonic Operands Function
54 D HSCR
S
1
, S
2
, D
High Speed Counter Reset
Bit Devices Word devices Program Steps
Type
OP
X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * *
S
2
*
D * * * *
DHSCR: 13 steps
ELC ELCB ELCM
PB PC/PA/PH PV PB PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P
Operands:
S
1
: Compare value
S
2
: High-speed counter number
D
: Compare result
Description:
1. DHSCR compares the current value of the counter
S
2
against a compare value
S
1
. When the
counters current value changes to a value equal to
S
1
, address
D
is reset to OFF. Once reset,
even if the compare result is no longer equal,
D
will remain OFF.
2. If
D
is specified as Y0~Y7 (ELCM-PH/PA: Y0~Y3), when the compare value and the present
value of the high-speed counter are equal, the compare result will immediately de-energize the
external output Y0~Y7 (ELCM-PH/PA: Y0~Y3). . M and S addresses are also allowed for
D.
3. Operand S
2
of ELC-PB, ELCB-PB must be C235~C238, C241~C244, C246~C249,
C251~C254.
4. Operand S
2
of ELC-PC/PA must be C235~C244, C246~C249, C251~C254.
5. Operand S
2
of ELC-PH/PV must be C235~ C255.
6. Operand S
2
of ELCM-PH/PA must be C232~ C254.
7. Operand D of ELC-PB/PC/PA, ELCB-PB cannot use the counter addresses for
D.
8. Operand D of ELC-PH can use C243, C245, C250, and C255.
9. Operand D of ELC-PV can be use C241~C254.
10. Operand D of ELCM-PH/PA can be use C232~ C254.
Program Example 1:
When M0=ON and C251’s present value goes from 99
→
100 or 101
→
100, Y0 will be reset to OFF.
When C251’s present value changes from 199 to 200, the contact C251 will be ON and Y20=ON.
M1000
DCNT C251 K200
M0
DHSCR K100 C251 Y0
C251
SET Y20