Eaton ELC-PB, Programming Manual

Page: 255 / 728

E L C P r o g r a m m i n g M a n u a l
F o r m o r e i nf o r m a t i o n v i sit :
w w w. e a t o n . c o m
MN05003003E
3-86
API Mnemonic Operands Function
34 SFTR P
S, D, n
1
, n
2
Bit Shift Right
Bit Devices Word devices Program Steps
Type
OP
X Y M S K H KnX KnY KnM KnS T C D E F
S * * * *
D * * *
n
1
* *
n
2
* *
SFTR, SFTRP: 9 steps
ELC ELCB ELCM
PB PC/PA/PH PV PB PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P
Operands:
S
: Starting address of the source device
D
: Starting address of the destination device
n
1
: Length of data to be shifted
n
2
: Number of bits to be shifted as a group
Description:
1. Shift
n
1
bits of
S
to the right by
n
2
bits. Shift
n
2
bits of
D
to the most significant bits of
S
.
2. This instruction works best with the pulse instruction (SFTRP).
3. Valid range of operand
n1
,
n2
: 1 ≤
n2
≤
n1
≤ 1024, In ELC-PB, ELCB-PB models: 1
≦
n2
≦
n1
≦
512
Program Example:
1. When X0 OFF
→
ON, the 16 bits M0~M15 will shift 4 bits to the right, and 4 bits from X0-X3
into M12-M15..
2. Please refer to the following n ~ r steps to perform SFTR instruction during a single scan.
n M3~M0
→
Carry
o M7~M4
→
M3~M0
p M11~M8
→
M7~M4
q M15~M12
→
M11~M8
r X3~X0
→
M15~M12 complete
X0
SFTR X0 M0 K16 K4
X3 X2 X1 X0
M15 M14 M13 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 M2 M1 M0
1 2 3 4
5
4 bits in a group shift to the right
Carry