Eaton ELC-PB, Programming Manual

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2. Prog rammi ng Con cep ts
M N050 03003E F or m ore info rm ati on vi sit: www.eaton.co m 2-79
X2
Y2
X1
P1 CJ
X0
Y1
P**
0
P1 N
CALL subroutine, SRET subroutine END:
When X0 is ON, it will jump to P2 to execute the designated subroutine as executing CALL
instruction. When executing SRET instruction, return to address 24 to go on executing.
Y0
X1
P2 CALL
X0
Y1
P**
20
P2
FEND
Y1
SRET
24
(subroutine
P2)
subroutine
Call subroutine P**
subroutine return
Interrupt pointer I:
It is used with application instruction EI, DI, IRET. There are five functions below. Interrupt insert
should be used with EI, interrupt insert enable, interrupt insert disable and IRET interrupt insert
return, etc.
1. External interrupt
In ELC-PB/PC/PA/PH, ELCB-PB, When input signal of input terminal X0~X5 is triggered on rising-
edge, it will interrupt the present program and jump to the designated interrupt subroutine pointer
I001(X0), I101(X1), I201(X2), I301(X3), I401(X4), I501(X5) to execute and return to the previous
address to execute when executing IRET instruction.
In ELC-PC/PA V1.2 and above, when I401 (X4) works with X0 (C235, C251 or C253), the value of
(C243 or C255) will be stored in (D1180, D1181) and I501 (X5) works with X1 (C236), the value of
high-speed counter (C236) will be stored in (D1198, D1199).
In ELC-PH V1.2 and above, when I401 (X4) works with X10 (C243 or C255), the value of high-
speed counter (C243 or C255) will be stored in (D1180, D1181) and I501 (X5) works with X11
(C245), the value of high-speed counter (C243 or C255) will be stored in (D1198, D1199).
In ELC-PV , when input signal of input terminal X0~X5 is triggered on rising-edge or falling-edge, it
will interrupt current program execution and jump to the designated interrupt subroutine pointer
I000/I001(X0), I100/I101(X1), I200/I201(X2), I300/I301(X3), I400/I401(X4), I500/I501(X5),. When
IRET instruction is executed, program execution returns to the address before interrupt occurs.