Eaton ELC-PB, Programming Manual

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3 . I n s t r u c t i o n S e t
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3-441
API Mnemonic Operands Function
187 MBWR P
S, n, D
Matrix Bit Write
Bit Devices Word devices Program Steps
Type
OP
X Y M S K H KnX KnY KnM KnS T C D E F
S * * * * * * *
n * * *
D * * * * * * * *
MBWR, MBWRP: 7 steps
ELC ELCB ELCM
PB PC/PA/PH PV PB PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P
Operands:
S
: matrix source address
n
: matrix length (K1~K256)
D
: pointer to where the target address is
saved
Description:
1. When executing the instruction, it will look at M1094 (matrix pointer clear flag) to see if it is ON.
If it is ON, pointer
D
will be cleared to 0 and write the state of M1096 (matrix shift/input
complement flag) into bit 0 of
S
. It will see if M1093 (matrix pointer increase flag) is ON after
writing each bit and increase
D
by 1 if it is ON. When writing to the last bit, M1089 (matrix
search end flag) =ON, and pointer
D
will record the number of the bit written to and end
executing the instruction. If
D
exceeds its range, M1092=1.
2. The Pointer should be a 16-bit D-register.
3.
S
designate KnX, KnY, KnM and KnS;
D
designates KnY, KnM and KnS ELC-PC/PA/PH,
ELCM-PH/PA can designate n = 4. ELC-PV can designate n 4
≦
.
4. Flags: Refer to explanation for M1089-M1096 below.
Program Example:
1. When X0 transitions from OFF
→
ON, the pointer clear flag M1094=OFF and if the matrix
pointer flag M1093=1, the pointer (D20) is increased by 1.
2. When the present pointer is D20=45, M1096 (matrix shift/input complement flag) =1. When X0
is executed once from OFF
→
ON, it will obtain following result:
X0
MBWRP D0 K3 D20